<?xml version="1.0" encoding="utf-8" standalone="no"?>
<!DOCTYPE codeDefinitions SYSTEM "../codeDefinitions.dtd">

<codeDefinitions>
  <codeBlock>

    <code name="fuses" caption="fuses (DCR) configuration">
      <line register="FOSC" action="WCFG" mask="0xFFFF" comment="xFSCKM[2]xxxxFGS[2]xxxxFG1[4]"></line>
      <line register="FWDT" action="WCFG" mask="0xFFFF" comment="FWDTENxxxxxxxxxxFWPSA[2]FWPSB[4]"></line>
      <line register="FBORPOR" action="WCFG" mask="0xFFFF" comment="MCLRENxxxxPWMPIN,HPOL,LPOL,BORENxBORV[2]xxFPWRT[4]"></line>
    </code>

    <code name="Interrupts" caption="Disable Interrupts during configuration">
      <line comment="clear int flags:"></line>
      <line comment="CN,BCL,I2C,NVM,AD,U1TX,U1RX,SPI1,T3,T2,OC2,IC2,T1,OC1,IC1,INT0"></line>
      <line register="IFS0" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line comment="clear int flags:"></line>
      <line comment="IC6...3,C1,SPI2,U2TX,U2RX,INT2,T5,T4,OC4,OC3,IC8,IC7,INT1"></line>
      <line register="IFS1" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line comment="clear int flags:"></line>
      <line comment="xxxFLTB,FLTA,LVD,DCI,QEI,PWM,C2,INT4,INT3,OC8...5"></line>
      <line register="IFS2" action="W" value="0x0000" mask="0x1FFF" comment=""></line>

      <line register="IEC0" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="IEC1" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="IEC2" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
    </code>

    <code name="Reset" caption="Reset configuration">
      <line comment="TRAPR,IOPWR,BGST,LVDEN,LVDL[4],EXTR,SWR,SWDTEN,WDTO,SLEEP,IDLE,BOR,POR"></line>
      <line register="RCON" action="WREG" mask="0xFFFF" comment=""></line>
    </code>

    <code name="DSP" caption="DSP core configuration">
      <line register="CORCON" action="WREG" mask="0xFFFF" comment="xxxxEDT,DL[3],SATA,SATB,SATDW,ACCSAT,IPL3,PSV,RND,IF"></line>
    </code>

    <code name="NVM" caption="NVM configuration - not implemented">
    </code>

    <code name="Oscillator" caption="Oscillator configuration">
      <line comment="method to override OSCCON write protect"></line>
      <line register="OSCCON" action="LREG.b_H" value="WREG" mask="0xFF" comment="xxCOSC[2]xxNOSC[2]"></line>
      <line register="W1" action="W.b_H" value="0x78" mask="0xFF" comment=""></line>
      <line register="W2" action="W.b_H" value="0x9A" mask="0xFF" comment=""></line>
      <line code="MOV.W #OSCCON, W3" comment=""></line>

      <line code="MOV.B W1, [W3+1]" comment=""></line>
      <line code="MOV.B W2, [W3+1]" comment=""></line>
      <line code="MOV.B W0, [W3+1]" comment=""></line>

      <line register="OSCCON" action="LREG.b_L" value="WREG" mask="0xFF" comment="POST[2]LOCKxCFxLPOSCEN,OSWEN"></line>
      <line register="W1" action="W.b_L" value="0x46" mask="0xFF" comment=""></line>
      <line register="W2" action="W.b_L" value="0x57" mask="0xFF" comment=""></line>

      <line code="MOV.B W1, [W3+0]" comment=""></line>
      <line code="MOV.B W2, [W3+0]" comment=""></line>
      <line code="MOV.B W0, [W3+0]" comment=""></line>
    </code>

    <code name="A2D" caption="A2D configuration">
      <line register="ADPCFG" action="W" value="0xFFFF" mask="0xFFFF" comment="force all A2D ports to digital IO at first"></line>
    </code>

    <code name="IOPort" caption="IO Ports configuration">
      <line register="PORTB" action="WREG" mask="0xFFFF" comment="enable port B, 15...0"></line>
      <line register="TRISB" action="WREG" mask="0xFFFF" comment="direction port B, in=1, 15...0"></line>

      <line register="PORTC" action="WREG" mask="0xFFFF" comment="enable port C, 15...0"></line>
      <line register="TRISC" action="WREG" mask="0xFFFF" comment="direction port C, in=1, 15...0"></line>

      <line register="PORTD" action="WREG" mask="0xFFFF" comment="enable port D, 15...0"></line>
      <line register="TRISD" action="WREG" mask="0xFFFF" comment="direction port D, in=1, 15...0"></line>

      <line register="PORTF" action="WREG" mask="0xFFFF" comment="enable port F, 15...0"></line>
      <line register="TRISF" action="WREG" mask="0xFFFF" comment="direction port F, in=1, 15...0"></line>

      <line register="PORTG" action="WREG" mask="0xFFFF" comment="enable port G, 15...0"></line>
      <line register="TRISG" action="WREG" mask="0xFFFF" comment="direction port G, in=1, 15...0"></line>
    </code>

    <code name="ICN" caption="Input Change Notification configuration">
      <line register="CNEN1" action="WREG" mask="0xFFFF" comment="enable change notification, 15...0"></line>
      <line register="CNPU1" action="WREG" mask="0xFFFF" comment="enable pullup change notification, 15...0"></line>
      <line register="CNEN2" action="WREG" mask="0x003F" comment="enable change notification, 21...16 LSBits 7...0"></line>
      <line register="CNPU2" action="WREG" mask="0x003F" comment="enable pullup change notification, 21...16 LSBits 7...0"></line>
    </code>

    <code name="TMR" caption="Timers configuration">
      <line comment="stop timers"></line>
      <line register="T1CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="T2CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="T3CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>

      <line register="T4CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="T5CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>

      <line comment="timers 123"></line>
      <line register="TMR1" action="WREG" mask="0xFFFF" comment="timer register"></line>
      <line register="PR1" action="WREG" mask="0xFFFF" comment="period register"></line>

      <line register="TMR3" action="WREG" mask="0xFFFF" comment="timer register"></line>
      <line register="TMR3HLD" action="WREG" mask="0xFFFF" comment="timer holding register for 32bit"></line>
      <line register="PR3" action="WREG" mask="0xFFFF" comment="period register"></line>

      <line register="TMR2" action="WREG" mask="0xFFFF" comment="timer register"></line>
      <line register="PR2" action="WREG" mask="0xFFFF" comment="period register"></line>

      <line comment="timers 45"></line>
      <line register="TMR5" action="WREG" mask="0xFFFF" comment="timer register"></line>
      <line register="TMR5HLD" action="WREG" mask="0xFFFF" comment="timer holding register for 32bit"></line>
      <line register="PR5" action="WREG" mask="0xFFFF" comment="period register"></line>

      <line register="TMR4" action="WREG" mask="0xFFFF" comment="timer register"></line>
      <line register="PR4" action="WREG" mask="0xFFFF" comment="period register"></line>
    </code>

    <code name="IC1" caption="Input Capture configuration">
      <line register="IC1CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC2CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC3CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC4CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC5CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC6CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC7CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
      <line register="IC8CON" action="WREG" mask="0xFFFF" comment="xxICSDLxxxxxICTMR,ICI[2]ICOV,ICBNE,ICM[3]"></line>
    </code>

    <code name="OC1" caption="Turn off OC1 thru OC8">
      <line comment="associated timers need to be turned off first"></line>
      <line register="OC1CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC2CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC3CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC4CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC5CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC6CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC7CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="OC8CON" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
    </code>

    <code name="OC1" caption="Output Compare configuration">
      <line register="OC1RS" action="WREG" mask="0xFFFF" comment="output compare 1 secondary register"></line>
      <line register="OC1R" action="WREG" mask="0xFFFF" comment="output compare 1 main register"></line>
      <line register="OC1CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC2RS" action="WREG" mask="0xFFFF" comment="output compare 2 secondary register"></line>
      <line register="OC2R" action="WREG" mask="0xFFFF" comment="output compare 2 main register"></line>
      <line register="OC2CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC3RS" action="WREG" mask="0xFFFF" comment="output compare 3 secondary register"></line>
      <line register="OC3R" action="WREG" mask="0xFFFF" comment="output compare 3 main register"></line>
      <line register="OC3CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC4RS" action="WREG" mask="0xFFFF" comment="output compare 4 secondary register"></line>
      <line register="OC4R" action="WREG" mask="0xFFFF" comment="output compare 4 main register"></line>
      <line register="OC4CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC5RS" action="WREG" mask="0xFFFF" comment="output compare 5 secondary register"></line>
      <line register="OC5R" action="WREG" mask="0xFFFF" comment="output compare 5 main register"></line>
      <line register="OC5CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC6RS" action="WREG" mask="0xFFFF" comment="output compare 6 secondary register"></line>
      <line register="OC6R" action="WREG" mask="0xFFFF" comment="output compare 6 main register"></line>
      <line register="OC6CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC7RS" action="WREG" mask="0xFFFF" comment="output compare 7 secondary register"></line>
      <line register="OC7R" action="WREG" mask="0xFFFF" comment="output compare 7 main register"></line>
      <line register="OC7CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>

      <line register="OC8RS" action="WREG" mask="0xFFFF" comment="output compare 8 secondary register"></line>
      <line register="OC8R" action="WREG" mask="0xFFFF" comment="output compare 8 main register"></line>
      <line register="OC8CON" action="WREG" mask="0xFFFF" comment="xxOCSIDLxxxxxxxxOCFLT,OCTSEL,OCM[3]"></line>
    </code>

    <code name="SPI" caption="SPI configuration">
      <line register="SPI1BUF" action="R" mask="0xFFFF" comment="SPI 1 buffer"></line>
      <line register="SPI1STAT" action="WREG" mask="0xFFFF" comment="SPIENxSPISIDLxxxxxxSPIROVxxxxSPITBF,SPIRBF"></line>
      <line comment="xFRMEN,SPIFSDxDISSDO,MODE16,SMP,CKE,SSEN,CKP,MSTEN,SPRE[3]PPRE[2]"></line>
      <line register="SPI1CON" action="WREG" mask="0xFFFF" comment=""></line>

      <line register="SPI2BUF" action="R" mask="0xFFFF" comment="SPI 2 buffer"></line>
      <line register="SPI2STAT" action="WREG" mask="0xFFFF" comment="SPIENxSPISIDLxxxxxxSPIROVxxxxSPITBF,SPIRBF"></line>
      <line comment="xFRMEN,SPIFSDxDISSDO,MODE16,SMP,CKE,SSEN,CKP,MSTEN,SPRE[3]PPRE[2]"></line>
      <line register="SPI2CON" action="WREG" mask="0xFFFF" comment=""></line>
    </code>

    <code name="I2C" caption="I2C configuration">
      <line register="I2CRCV" action="R" mask="0x01FF" comment="receive register bits7...0"></line>
      <line register="I2CADD" action="WREG" mask="0x01FF" comment="address register bits9...0"></line>
      <line register="I2CBRG" action="WREG" mask="0x01FF" comment="baud rate generator bits 8...0"></line>
      <line comment="ACKSTAT,TRSTATxxxBCL,GCSTAT,ADD10,IWCOL,I2COV,D_A,P,S,R_W,RBF,TBF"></line>
      <line register="I2CSTAT" action="WREG" mask="0x01FF" comment=""></line>
      <line comment="I2CENxI2CSIDL,SCLREL,IPMIEN,A10M,DISSLW,SMEN"></line>
      <line comment=",GCEN,STREN,ACKDT,ACKEN,RCEN,PEN,RSEN,SEN"></line>
      <line register="I2CCON" action="WREG" mask="0x01FF" comment=""></line>
    </code>

    <code name="UART1" caption="UART 1 configuration">
      <line register="U1BRG" action="WREG" mask="0xFFFF" comment="UART 1 baud rate generator"></line>
      <line comment="UTXISELxxxUTXBRK,UTXEN,UTXBF,TRMT,URXISEL[2]"></line>
      <line comment=",ADDEN,RIDLE,PERR,FERR,OERR,URXDA"></line>
      <line register="U1MODE" action="W" value="0x8000" mask="0xFFFF" comment="enabling UART flushes buffers"></line>
      <line register="U1STA" action="WREG" mask="0xFFFF" comment=""></line>
      <line register="U1MODE" action="WREG" mask="0xFFFF" comment="UARTENxUSIDLxxALTIOxxWAKE,LPBACK,ABAUDxxPDSEL[2]STSEL"></line>
    </code>

    <code name="UART2" caption="UART 2 configuration">
      <line register="U2BRG" action="WREG" mask="0xFFFF" comment="UART 1 baud rate generator"></line>
      <line comment="UTXISELxxxUTXBRK,UTXEN,UTXBF,TRMT,URXISEL[2]"></line>
      <line comment=",ADDEN,RIDLE,PERR,FERR,OERR,URXDA"></line>
      <line register="U2MODE" action="W" value="0x8000" mask="0xFFFF" comment=""></line>
      <line register="U2STA" action="WREG" mask="0xFFFF" comment=""></line>
      <line register="U2MODE" action="WREG" mask="0xFFFF" comment="UARTENxUSIDLxxALTIOxxWAKE,LPBACK,ABAUDxxPDSEL[2]STSEL"></line>
    </code>

    <code name="CAN" caption="CAN bus configuration">
      <line comment="Request CAN module go into config mode so"></line>
      <line comment="we can update configuration registers."></line>

      <line code="MOV C1CTRL, W0" comment="get current control settings"></line>
      <line code="BCLR W0, #8" comment="clear request config bits"></line>
      <line code="BCLR W0, #9" comment="clear request config bits"></line>
      <line code="BCLR W0, #10" comment="clear request config bits"></line>
      <line code="BSET W0, #10" comment="set config mode bits"></line>
      <line code="MOV W0, C1CTRL" comment="send request"></line>

      <line comment="Loop until current mode is 'config'."></line>

      <line code="MOV #0x0080, W1" comment="config mode setting"></line>
      <line code="MOV #0x00E0, W2" comment="mask for current mode bits"></line>

      <line label="CAN1_CONFIG_WAIT" comment=""></line>
      <line code="MOV C1CTRL, W0" comment="get status"></line>
      <line code="AND W2, W0, W0" comment="mask off current mode bits"></line>
      <line code="SUB W1, W0, W0" comment="compare to config mode value"></line>
      <line code="BRA NZ, CAN1_CONFIG_WAIT" comment="loop back if no match"></line>

      <line comment="config CAN1"></line>

      <line register="C1RXF0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXF1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXF2SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF2EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXF3SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF3EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXF4SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF4EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXF5SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXF5EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXM0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXM0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1RXM1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1RXM1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C1TX2SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1TX2EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C1TX2CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C1TX1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1TX1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C1TX1CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C1TX0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C1TX0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C1TX0CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C1RX1SID" action="WREG" mask="0xFFFF" comment="SRRxEXIDENxEID17,EID16"></line>
      <line register="C1RX1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C1RX1CON" action="WREG" mask="0xFFFF" comment="xRXRTRxxRB[2]DLC[4]RXFUL,RXM[2]xRXRTRO,FILHIT[3]"></line>

      <line register="C1RX0SID" action="WREG" mask="0xFFFF" comment="SRRxEXIDENxEID17,EID16"></line>
      <line register="C1RX0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C1RX0CON" action="WREG" mask="0xFFFF" comment="xRXRTRxxRB[2]DLC[4]RXFUL,RXM[2]RXRTRO,DBEN,JTOFF,FILHIT0"></line>

      <line register="C1CFG1" action="WREG" mask="0xFFFF" comment="xxxxxxxxSJWS[2]BRP[6]"></line>
      <line register="C1CFG2" action="WREG" mask="0xFFFF" comment="CANCAP,WAKFILxxxSEG2PH[3]BTLMODE,SAM,SEG1PH[3]PRSEG[3]"></line>

      <line register="C1INTF" action="W" value="0x0000" mask="0xFFFF" comment="clear all flags"></line>
      <line register="C1INTE" action="WREG" mask="0xFFFF" comment=""></line>

      <line register="C1EC" action="W" value="0x0000" mask="0xFFFF" comment="clear tx and rx error registers"></line>


      <line comment="request post-config operating mode for CAN module "></line>

      <line register="C1CTRL" action="WREG" mask="0x2700" comment="send post config settings"></line>

      <line code="MOV C1CTRL, W1" comment="get requested mode"></line>
      <line code="MOV #0x0700, W2" comment="remove all but desired bits"></line>
      <line code="AND W1, W2, W1" comment="remove all but desired bits"></line>
      <line code="LSR W1, #0x03, W1" comment="shift bits to current mode location"></line>
      <line code="MOV #0x00E0, W2" comment="mask for current mode bits"></line>

      <line label="CAN1_OPMODE_WAIT" comment=""></line>
      <line code="MOV C1CTRL, W0" comment="get status"></line>
      <line code="AND W2, W0, W0" comment="mask off current mode bits"></line>
      <line code="SUB W1, W0, W0" comment="compare to config mode value"></line>
      <line code="BRA NZ, CAN1_OPMODE_WAIT" comment="loop back if no match"></line>

      <line comment="Request CAN module go into config mode so"></line>
      <line comment="we can update configuration registers."></line>

      <line code="MOV C2CTRL, W0" comment="get current control settings"></line>
      <line code="BCLR W0, #8" comment="clear request config bits"></line>
      <line code="BCLR W0, #9" comment="clear request config bits"></line>
      <line code="BCLR W0, #10" comment="clear request config bits"></line>
      <line code="BSET W0, #10" comment="set config mode bits"></line>
      <line code="MOV W0, C2CTRL" comment="send request"></line>

      <line comment="Loop until current mode is 'config'."></line>

      <line code="MOV #0x0080, W1" comment="config mode setting"></line>
      <line code="MOV #0x00E0, W2" comment="mask for current mode bits"></line>

      <line label="CAN2_CONFIG_WAIT" comment=""></line>
      <line code="MOV C2CTRL, W0" comment="get status"></line>
      <line code="AND W2, W0, W0" comment="mask off current mode bits"></line>
      <line code="SUB W1, W0, W0" comment="compare to config mode value"></line>
      <line code="BRA NZ, CAN2_CONFIG_WAIT" comment="loop back if no match"></line>

      <line comment="config CAN2"></line>

      <line register="C2RXF0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXF1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXF2SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF2EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXF3SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF3EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXF4SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF4EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXF5SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXF5EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXM0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXM0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2RXM1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2RXM1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>

      <line register="C2TX2SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2TX2EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C2TX2CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C2TX1SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2TX1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C2TX1CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C2TX0SID" action="WREG" mask="0xFFFF" comment="SIDxEXIDENxEID17,EID16"></line>
      <line register="C2TX0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C2TX0CON" action="WREG" mask="0xFFFF" comment="xTXRTRxxDLC[4]xTXABT,TXLARBmTXERR,TXREQxTXPRI[2]"></line>

      <line register="C2RX1SID" action="WREG" mask="0xFFFF" comment="SRRxEXIDENxEID17,EID16"></line>
      <line register="C2RX1EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C2RX1CON" action="WREG" mask="0xFFFF" comment="xRXRTRxxRB[2]DLC[4]RXFUL,RXM[2]xRXRTRO,FILHIT[3]"></line>

      <line register="C2RX0SID" action="WREG" mask="0xFFFF" comment="SRRxEXIDENxEID17,EID16"></line>
      <line register="C2RX0EID" action="WREG" mask="0xFFFF" comment="extended id"></line>
      <line register="C2RX0CON" action="WREG" mask="0xFFFF" comment="xRXRTRxxRB[2]DLC[4]RXFUL,RXM[2]RXRTRO,DBEN,JTOFF,FILHIT0"></line>

      <line register="C2CFG1" action="WREG" mask="0xFFFF" comment="xxxxxxxxSJWS[2]BRP[6]"></line>
      <line register="C2CFG2" action="WREG" mask="0xFFFF" comment="CANCAP,WAKFILxxxSEG2PH[3]BTLMODE,SAM,SEG1PH[3]PRSEG[3]"></line>

      <line register="C2INTF" action="W" value="0x0000" mask="0xFFFF" comment="clear all flags"></line>
      <line register="C2INTE" action="WREG" mask="0xFFFF" comment=""></line>

      <line register="C2EC" action="W" value="0x0000" mask="0xFFFF" comment="clear tx and rx error registers"></line>

      <line comment="request post-config operating mode for CAN module "></line>

      <line register="C2CTRL" action="WREG" mask="0x2700" comment="send post config settings"></line>

      <line code="MOV C2CTRL, W1" comment="get requested mode"></line>
      <line code="MOV #0x0700, W2" comment="remove all but desired bits"></line>
      <line code="AND W1, W2, W1" comment="remove all but desired bits"></line>
      <line code="LSR W1, #0x03, W1" comment="shift bits to current mode location"></line>
      <line code="MOV #0x00E0, W2" comment="mask for current mode bits"></line>

      <line label="CAN2_OPMODE_WAIT" comment=""></line>
      <line code="MOV C2CTRL, W0" comment="get status"></line>
      <line code="AND W2, W0, W0" comment="mask off current mode bits"></line>
      <line code="SUB W1, W0, W0" comment="compare to config mode value"></line>
      <line code="BRA NZ, CAN2_OPMODE_WAIT" comment="loop back if no match"></line>

    </code>

    <code name="DCI" caption="DCI configuration - only in sensor family, temp here for code review">
      <line register="DCICON1" action="W" value="0x0000" mask="0xFFFF" comment="hard clear to disable during init"></line>

      <line register="RXBUF0" action="R" mask="0xFFFF" comment="flush buffer 0"></line>
      <line register="RXBUF1" action="R" mask="0xFFFF" comment="flush buffer 1"></line>
      <line register="RXBUF2" action="R" mask="0xFFFF" comment="flush buffer 2"></line>
      <line register="RXBUF3" action="R" mask="0xFFFF" comment="flush buffer 3"></line>

      <line register="TSCON" action="WREG" mask="0xFFFF" comment="TSE15...0"></line>
      <line register="RSCON" action="WREG" mask="0xFFFF" comment="RSE15...0"></line>
      <line register="DCISTAT" action="WREG" mask="0xFFFF" comment="xxxxSLOT[4]xxxxROV,RFUL,TUNF,TMPTY"></line>
      <line register="DCICON3" action="WREG" mask="0xFFFF" comment="xxxBCG[12]"></line>
      <line register="DCICON2" action="WREG" mask="0xFFFF" comment="xxxxBLEN[2]xCOFSG[4]xWS[4]"></line>
      <line comment="DCIENxDCISIDLxDLOOP,CSCKD,CSCKE,COFSD,UNFM,CSDOM,DJSTxxxCOFSM[2]"></line>
      <line register="DCICON1" action="WREG" mask="0xFFFF" comment=""></line>
    </code>

    <code name="A2D" caption="A2D configuration">
      <line register="ADCON1" action="W" value="0x0000" mask="0xFFFF" comment="Turn off A2D before setting registers"></line>
      <line comment="B15:0=CSSL15:0"></line>
      <line register="ADCSSL" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="B15:14=CH123NB1:0 B13=CH123SB B12=CH0NB B11:8=CH0SB3:0"></line>
      <line comment="B7:6=CH123NA1:0 B5=CH123SA B4=CH0NA B3:0=CH0SA3:0"></line>
      <line register="ADCHS" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="B15:0=PCFG15:0"></line>
      <line register="ADPCFG" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="B12:8=SAMC4:0 B7=ADRC B5:0=ADCS5:0"></line>
      <line register="ADCON3" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="B15:13=VCFG2:0 B12=OFFCAL B10=CSCNA B9:8=CHPS1:0"></line>
      <line comment="B7=BUFS B5:2=SMPI B1=BUFM B0=ALTS"></line>
      <line register="ADCON2" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="B15=ADON B13=ADSIDL B12=ADSTBY B9:8=FORM"></line>
      <line comment="B7:5=SSRC B3=SIMSAM B2=ASAM B1=SAMP B0=CONV"></line>
      <line register="ADCON1" action="WREG" mask="0xFFFF" comment=""></line>
    </code>

    <code name="required" caption="Interrupt flags cleared and interrupt configuration">
      <line comment="interrupt priorities"></line>
      <line register="IPC0" action="WREG" mask="0x7777" comment="xT1IP[3]xOC1IP[3]xIC1IP[3]xINTOIP[3]"></line>
      <line register="IPC1" action="WREG" mask="0x7777" comment="xT3IP[3]xT2IP[3]xOC2IP[3]xIC2IP[3]"></line>
      <line register="IPC2" action="WREG" mask="0x7777" comment="xADIP[3]xU1TXIP[3]xU1RXIP[3]xSPI1IP[3]"></line>
      <line register="IPC3" action="WREG" mask="0x7777" comment="xCNIP[3]xBCLIP[3]xI2CIP[3]xNVMIP[3]"></line>
      <line register="IPC4" action="WREG" mask="0x7777" comment="xOC3IP[3]xIC8IP[3]xIC7IP[3]xINT1IP[3]"></line>
      <line register="IPC5" action="WREG" mask="0x7777" comment="xINT2IP[3]xT5IP[3]xT4IP[3]xOC4IP[3]"></line>
      <line register="IPC6" action="WREG" mask="0x7777" comment="xC1IP[3]xSPI2IP[3]xU2TXIP[3]xU2RXIP[3]"></line>
      <line register="IPC7" action="WREG" mask="0x7777" comment="xIC6IP[3]xIC5IP[3]xIC4IP[3]xIC3IP[3]"></line>
      <line register="IPC8" action="WREG" mask="0x7777" comment="xOC8IP[3]xOC7IP[3]xOC6IP[3]xOC5IP[3]"></line>
      <line register="IPC9" action="WREG" mask="0x7777" comment="xPWMIP[3]xC2IP[3]xINT4IP[3]xINT3IP[3]"></line>
      <line register="IPC10" action="WREG" mask="0x7777" comment="xFLTAIP[3]xLVDIP[3]xDCIIP[3]xQEIIP[3]"></line>

      <line comment="external interrupt enables"></line>
      <line comment="NSTDISxxxxOVATE,OVBTE,COVTExxxMATHERR,ADDRERR,STKERR,OSCFAILx"></line>
      <line register="INTCON1" action="WREG" mask="0x801E" comment=""></line>
      <line register="INTCON2" action="WREG" mask="0x801F" comment="ALTIVTxxxxxxxxxxINTnEP[5]"></line>
    </code>

    <code name="TMR" caption="Start timers">
      <line register="T1CON" action="WREG" mask="0xFFFF" comment="TONxTSIDLxxxxxxTGATE,TCKPS[2]xTSYNC,TCSx"></line>
      <line register="T3CON" action="WREG" mask="0xFFFF" comment="TONxTSIDLxxxxxxTGATE,TCKPS[2]xxTCSx"></line>
      <line register="T2CON" action="WREG" mask="0xFFFF" comment="TONxTSIDLxxxxxxTGATE,TCKPS[2]T32xTCSx"></line>
      <line register="T5CON" action="WREG" mask="0xFFFF" comment="TONxTSIDLxxxxxxTGATE,TCKPS[2]xxTCSx"></line>
      <line register="T4CON" action="WREG" mask="0xFFFF" comment="TONxTSIDLxxxxxxTGATE,TCKPS[2]T32xTCSx"></line>
    </code>

    <code name="CPU" caption="CPU register configuration">
      <line register="SR" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="SR" action="WREG" mask="0xFFFF" comment=""></line>

      <line register="W0" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="W1" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
      <line register="W2" action="W" value="0x0000" mask="0xFFFF" comment=""></line>
    </code>

    <code name="Interrupts" caption="enable interrupts">
      <line comment="feature interrupt enables"></line>
      <line comment="int enables:CN,BCL,I2C,NVM,AD,U1TX,U1RX,SPI1,T3,T2,OC2,IC2,T1,OC1,IC1,INT0"></line>
      <line register="IEC0" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="int enables:IC6...3,C1,SPI2,U2TX,U2RX,INT2,T5,T4,OC4,OC3,IC8,IC7,INT1"></line>
      <line register="IEC1" action="WREG" mask="0xFFFF" comment=""></line>
      <line comment="int enables:xxxFLTB,FLTA,LVD,DCI,QEI,PWM,C2,INT4,INT3,OC8...5"></line>
      <line register="IEC2" action="WREG" mask="0x1FFF" comment=""></line>

      <line code="return" comment="end of init"></line>
    </code>

  </codeBlock>
</codeDefinitions>
