
format=0.1

#device=PIC17C42

vpp (range=12.750-13.250  dflt=13.000)
vdd (range=4.500-5.500  dfltrange=4.500-5.500  nominal=5.000)

pgming (memtech=eprom ovrpgm=3 tries=25)
    wait (pgm=100 cfg=100) 

pgmmem (region=0x0-0x7FF)
extpgmmem (region=0x800-0xFFFF modeaddr=0xFE00)
cfgmem (region=0xFE00-0xFE00)
testmem (region=0xFE10-0xFFDF)


NumBanks=4
UnusedRegs (0x100-0x10f)
UnusedRegs (0x118-0x1ff)
UnusedRegs (0x200-0x20f)
UnusedRegs (0x218-0x2ff)
UnusedRegs (0x300-0x30f)
UnusedRegs (0x318-0x3ff)


sfr (key=INDF0 addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF0' width='8')
sfr (key=FSR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR0' width='8')
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
sfr (key=PCLATH addr=0x3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='uuuuuuuu')
    bit (names='PCLATH' width='8')
sfr (key=ALUSTA addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='1111xxxx' mclr='1111uuuu')
    bit (names='FSR1 FSR0 OV Z DC C' width='2 2 1 1 1 1')
sfr (key=T0STA addr=0x5 size=1 access='rw rw rw rw rw rw rw u')
    reset (por='0000000-' mclr='0000000-')
    bit (names='INTEDG T0SE T0CS T0PS -' width='1 1 1 4 1')
sfr (key=CPUSTA addr=0x6 size=1 access='u u r rw r r u u')
    reset (por='--1111--' mclr='--11qq--')
    bit (names='- - STKAV GLINTD nTO nPD - -')
sfr (key=INTSTA addr=0x7 size=1 access='r rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PEIF T0CKIF T0IF INTF PEIE T0CKIE T0IE INTE')
sfr (key=INDF1 addr=0x8 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF1' width='8')
sfr (key=FSR1 addr=0x9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR1' width='8')
sfr (key=WREG addr=0xA size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='WREG' width='8')
sfr (key=TMR0 addr=0xB size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=TMR0L addr=0xB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0L' width='8')
sfr (key=TMR0H addr=0xC size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0H' width='8')
sfr (key=TBLPTR addr=0xD size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=TBLPTRL addr=0xD size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRL' width='8')
sfr (key=TBLPTRH addr=0xE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRH' width='8')
sfr (key=BSR addr=0xF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='BSR' width='8')
sfr (key=PORTA addr=0x10 size=1 access='rw u rw rw rw rw r r')
    reset (por='0-xxxxxx' mclr='0-uuuuuu')
    bit (names='nRBPU - RA5 RA4 RA3 RA2 RA1 RA0')
sfr (key=DDRB addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='DDRB7 DDRB6 DDRB5 DDRB4 DDRB3 DDRB2 DDRB1 DDRB0')
sfr (key=PORTB addr=0x12 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0')
sfr (key=RCSTA addr=0x13 size=1 access='rw rw rw rw u r r r')
    reset (por='0000-00x' mclr='0000-00u')
    bit (names='SPEN RX9 SREN CREN - FERR OERR RX9D')
sfr (key=RCREG addr=0x14 size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RCREG' width='8')
sfr (key=TXSTA addr=0x15 size=1 access='rw rw rw rw u u r rw')
    reset (por='0000--1x' mclr='0000--1u')
    bit (names='CSRC TX9 TXEN SYNC - - TRMT TX9D')
sfr (key=TXREG addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TXREG' width='8')
sfr (key=SPBRG addr=0x17 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SPBRG' width='8')
sfr (key=DDRC addr=0x110 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='DDRC7 DDRC6 DDRC5 DDRC4 DDRC3 DDRC2 DDRC1 DDRC0')
sfr (key=PORTC addr=0x111 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0')
sfr (key=DDRD addr=0x112 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='DDRD7 DDRD6 DDRD5 DDRD4 DDRD3 DDRD2 DDRD1 DDRD0')
sfr (key=PORTD addr=0x113 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0')
sfr (key=DDRE addr=0x114 size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - DDRE2 DDRE1 DDRE0')
sfr (key=PORTE addr=0x115 size=1 access='u u u u u rw rw rw')
    reset (por='-----xxx' mclr='-----uuu')
    bit (names='- - - - - RE2 RE1 RE0')
sfr (key=PIR addr=0x116 size=1 access='rw rw rw rw rw rw r r')
    reset (por='00000010' mclr='00000010')
    bit (names='RBIF TMR3IF TMR2IF TMR1IF CA2IF CA1IF TXIF RCIF')
sfr (key=PIE addr=0x117 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='RBIE TMR3IE TMR2IE TMR1IE CA2IE CA1IE TXIE RCIE')
sfr (key=TMR1 addr=0x210 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1' width='8')
sfr (key=TMR2 addr=0x211 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR2' width='8')
sfr (key=TMR3 addr=0x212 size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=TMR3L addr=0x212 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3L' width='8')
sfr (key=TMR3H addr=0x213 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3H' width='8')
sfr (key=PR1 addr=0x214 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PR1' width='8')
sfr (key=PR2 addr=0x215 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PR2' width='8')
sfr (key=PR3 addr=0x216 size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=PR3L addr=0x216 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PR3L' width='8')
sfr (key=PR3H addr=0x217 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PR3H' width='8')

sfr (key=CA1 addr=0x216 size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=CA1L addr=0x216 size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CA1L' width='8')
sfr (key=CA1H addr=0x217 size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CA1H' width='8')

sfr (key=PW1DCL addr=0x310 size=1 access='rw rw u u u u u u')
    reset (por='xx------' mclr='uu------')
    bit (names='DC1 DC0 - - - - - -')
sfr (key=PW2DCL addr=0x311 size=1 access='rw rw rw u u u u u')
    reset (por='xx0-----' mclr='uu0-----')
    bit (names='DC1 DC0 TM2PW2 - - - - -')
sfr (key=PW1DCH addr=0x312 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2')
sfr (key=PW2DCH addr=0x313 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='DC9 DC8 DC7 DC6 DC5 DC4 DC3 DC2')
sfr (key=CA2 addr=0x314 size=2 flags=j)
# The j flag means all these registers together form one larger register
sfr (key=CA2L addr=0x314 size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CA2L' width='8')
sfr (key=CA2H addr=0x315 size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CA2H' width='8')
sfr (key=TCON1 addr=0x316 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CA2ED CA1ED T16 TMR3CS TMR2CS TMR1CS' width='2 2 1 1 1 1')
sfr (key=TCON2 addr=0x317 size=1 access='r r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CA2OVF CA1OVF PWM2ON PWM1ON CA1/nPR3 TMR3ON TMR2ON TMR1ON')

 
                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#

cfgbits (key=CONFIG addr=0xFE00 unused=0xFFA0)
    field (key=OSC mask=0x3 desc="Oscillator")
        setting (req=0x3 value=0x3 desc="EC")
        setting (req=0x3 value=0x0 desc="LF")
        setting (req=0x3 value=0x1 desc="RC")
        setting (req=0x3 value=0x2 desc="XT")
# NOTE: The watch dog timer values 64/256 have been replaced by
#       the correct values 128/512. The data sheet as of today 1/2003
#       is incorrect.
    field (key=WDT mask=0xC desc="Watchdog Timer")
        setting (req=0xC value=0xC desc="x1")
        setting (req=0xC value=0x8 desc="x512")
        setting (req=0xC value=0x4 desc="x128")
        setting (req=0xC value=0x0 desc="TMR")
    field (key=PMODE mask=0x50 desc="Processor Mode")
        setting (req=0x50 value=0x50 desc="Microprocessor" mode=microproc region=0x0-0xFFFF nocfgtest)
            checksum (type=0x40 protregion=0x00-0x00)
        setting (req=0x50 value=0x0 desc="Prot. Microcontroller" mode=cpmicroctrl)
            checksum (type=0x43 protregion=0x0-0x7FF)
        setting (req=0x50 value=0x40 desc="Microcontroller" mode=microctrl)
            checksum (type=0x40 protregion=0x00-0x00)
        setting (req=0x50 value=0x10 desc="Ext. Microcontroller" mode=extmicroctrl region=0x800-0xFFFF nocfgtest)
            checksum (type=0x40 protregion=0x00-0x00)
