 
format=0.1

#device=PS500
# DOS: DOS-00376
# PS:  DS-21834
# DS:  

vpp (range=9.000-13.250 dflt=13.000)
vdd (range=5.000-5.500 dfltrange=5.000-5.500 nominal=5.500)

pgming (memtech=ee tries=1 lvpthresh=4.500 panelsize=0x2000)
    wait (pgm=1000 lvpgm=1000 eedata=4000 cfg=5000 userid=5000 erase=10000 lverase=1000)
    latches(pgm=8 eedata=2 userid=8 cfg=2 rowerase=64)   

pgmmem (region=0x0-0x3FFF)
eedata (region=0x00-0xff)

cfgmem (region=0x300000-0x30000D)
testmem (region=0x200000-0x2000BF)
userid (region=0x200000-0x200007)
bkbgvectmem (region=0x200028-0x200037)
devid (region=0x3FFFFE-0x3FFFFF idmask=0xFFE0 id=0x0700)

UnusedBankMask=0x7FFC
AccessBankSplitOffset=0x80
NumBanks=16

UnusedRegs (0xf00-0xf7f)
UnusedRegs (0xf82-0xf88)
UnusedRegs (0xf8b-0xf8f)
UnusedRegs (0xf94-0xf99)
UnusedRegs (0xfa3-0xfa5)
UnusedRegs (0xfaa-0xfb0)
UnusedRegs (0xfb6-0xfbf)
UnusedRegs (0xfd2-0xfd2)
UnusedRegs (0xfd4-0xfd4)


                               # ---------------#
#------------------------------# CORE Registers #------------------------------------------------#
                               # ---------------#

sfr (key=TOS addr=0xFFD size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
sfr (key=TOSU addr=0xFFF size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - TOSU' width='1 1 1 5')
sfr (key=TOSH addr=0xFFE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSH' width='8')
sfr (key=TOSL addr=0xFFD size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSL' width='8')

sfr (key=STKPTR addr=0xFFC size=1 access='rc rc u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='STKOVF STKUNF - STKPTR' width='1 1 1 5')

sfr (key=PCLAT addr=0xFF9 size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
sfr (key=PCLATU addr=0xFFB size=1 access='u u rw rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCU' width='1 1 1 5')
sfr (key=PCLATH addr=0xFFA size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCH' width='8')
sfr (key=PCL addr=0xFF9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')

sfr (key=TBLPTR addr=0xFF6 size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
sfr (key=TBLPTRU addr=0xFF8 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - - TBLPTRU' width='1 1 1 5')
sfr (key=TBLPTRH addr=0xFF7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRH' width='8')
sfr (key=TBLPTRL addr=0xFF6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRL' width='8')

sfr (key=TABLAT addr=0xFF5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TABLAT' width='8')

sfr (key=PROD addr=0xFF3 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
sfr (key=PRODH addr=0xFF4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODH' width='8')
sfr (key=PRODL addr=0xFF3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODL' width='8')

sfr (key=INTCON addr=0xFF2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    # NOTE: When IPEN (bit 7) in the RCON register is 0 use the following bit names
    qbit (names='GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    # NOTE: When IPEN (bit 7) in the RCON register is 1 use the following bit names
    qbit (names='GIEH GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
sfr (key=INTCON2 addr=0xFF1 size=1 access='rw rw rw rw u rw rw rw')
    reset (por='1111-111' mclr='1111-111')
    bit (names='nRBPU INTEDG0 INTEDG1 INTEDG2 - TMR0IP RAIP RBIP')
sfr (key=INTCON3 addr=0xFF0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11000x00' mclr='11000x00')
    bit (names='INT2IP INT1IP RAIE INT2IE INT1IE RAIF INT2IF INT1IF')
sfr (key=INDF0 addr=0xFEF size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF0' width='8')
sfr (key=POSTINC0 addr=0xFEE size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC0' width='8')
sfr (key=POSTDEC0 addr=0xFED size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC0' width='8')
sfr (key=PREINC0 addr=0xFEC size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC0' width='8')
sfr (key=PLUSW0 addr=0xFEB size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW0' width='8')
sfr (key=FSR0H addr=0xFEA size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR0H' width='1 1 1 1 4')
sfr (key=FSR0L addr=0xFE9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR0L' width='8')
sfr (key=WREG addr=0xFE8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='WREG' width='8')
sfr (key=INDF1 addr=0xFE7 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF1' width='8')
sfr (key=POSTINC1 addr=0xFE6 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC1' width='8')
sfr (key=POSTDEC1 addr=0xFE5 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC1' width='8')
sfr (key=PREINC1 addr=0xFE4 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC1' width='8')
sfr (key=PLUSW1 addr=0xFE3 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW1' width='8')
sfr (key=FSR1H addr=0xFE2 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR1H' width='1 1 1 1 4')
sfr (key=FSR1L addr=0xFE1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR1L' width='8')
sfr (key=BSR addr=0xFE0 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BSR' width='1 1 1 1 4')
sfr (key=INDF2 addr=0xFDF size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF2' width='8')
sfr (key=POSTINC2 addr=0xFDE size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC2' width='8')
sfr (key=POSTDEC2 addr=0xFDD size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC2' width='8')
sfr (key=PREINC2 addr=0xFDC size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC2' width='8')
sfr (key=PLUSW2 addr=0xFDB size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW2' width='8')
sfr (key=FSR2H addr=0xFDA size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR2H' width='1 1 1 1 4')
sfr (key=FSR2L addr=0xFD9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR2L' width='8')
sfr (key=STATUS addr=0xFD8 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - N OV Z DC C')
sfr (key=OSCCON addr=0xFD3 size=1 access='rw u u u r u u rw')
    reset (por='0---1--0' mclr='0---1--0')
    bit (names='IDLEN - - - OSTS - - SCS')
sfr (key=WDTCON addr=0xFD1 size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - SWDTEN')
sfr (key=RCON addr=0xFD0 size=1 access='rw rw u rw r r rw rw')
    reset (por='0--11100' mclr='0--uqquu')
    bit (names='IPEN GPB - nRI nTO nPD nPOR nBOR')
sfr (key=IPR2 addr=0xFA2 size=1 access='u rw u rw rw u rw u')
    reset (por='-1-11-1-' mclr='-1-11-1-')
    bit (names='- CMIP - EEIP BCLIP - TMR3IP -')
sfr (key=PIR2 addr=0xFA1 size=1 access='u rw u rw rw u rw u')
    reset (por='-0-00-0-' mclr='-0-00-0-')
    bit (names='- CMIF - EEIF BCLIF - TMR3IF -')
sfr (key=PIE2 addr=0xFA0 size=1 access='u rw u rw rw u rw u')
    reset (por='-0-00-0-' mclr='-0-00-0-')
    bit (names='- CMIE - EEIE BCLIE - TMR3IE -')
sfr (key=IPR1 addr=0xF9F size=1 access='u rw u u rw u rw rw')
    reset (por='-1--1-11' mclr='-1--1-11')
    bit (names='- ADIP - - SSPIP - TMR2IP TMR1IP')
sfr (key=PIR1 addr=0xF9E size=1 access='u rw u u rw u rw rw')
    reset (por='-0--0-00' mclr='-0--0-00')
    bit (names='- ADIF - - SSPIF - TMR2IF TMR1IF')
sfr (key=PIE1 addr=0xF9D size=1 access='u rw u u rw u rw rw')
    reset (por='-0--0-00' mclr='-0--0-00')
    bit (names='- ADIE - - SSPIE - TMR2IE TMR1IE')
sfr (key=BGCAL addr=0xF9C size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='----0111' mclr='----0111')
    bit (names='- - - - BGTC' width='1 1 1 1 4')
sfr (key=OSCCAL addr=0xF9B size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00111111' mclr='00111111')
    bit (names='REXT OSC' width='1 7')
sfr (key=REFCAL addr=0xF9A size=1 access='rw rw rw rw rw rw rw rw') 
    reset (por='--011111' mclr='--011111')
    bit (names='- - VRC' width='1 1 6')

                               # --------------#
#------------------------------# LED Registers #-------------------------------------------------#
                               # --------------#

sfr (key=LEDB addr=0xf91 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='LEDB' width='8')
sfr (key=LEDDC addr=0xf90 size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - LEDC' width='1 1 1 1 1 3')

                               # ----------------#
#------------------------------# PORTA Registers #-------------------------------------------------#
                               # ----------------#

# PORTA bit 5 is only available when MCLRE fuse is programmed to '0'.  Otherwise, RA5 reads '0'.  
# This bit is read only.
# LATA bits 5 and 7 are writeable but always read '0'; the latch output is used in nibble test
# operations in TMOD3, TMOD3A, and TMOD3B.

sfr (key=PORTA addr=0xF80 size=1 access='u rw r rw rw rw rw rw')
    reset (por='-xxxxxxx' mclr='-uuuuuuu')
    bit (names='- RA6 RA5 RA4 RA3 RA2 RA1 RA0')
sfr (key=LATA addr=0xF89 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0')
sfr (key=TRISA addr=0xF92 size=1 access='u rw u rw rw rw rw rw')
    reset (por='-1-11111' mclr='-1-11111')
    bit (names='- TRISA6 - TRISA4 TRISA3 TRISA2 TRISA1 TRISA0')

                               # ----------------#
#------------------------------# PORTB Registers #-----------------------------------------------------------------------------------------#
                               # ----------------#

sfr (key=PORTB addr=0xF81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0')
sfr (key=LATB addr=0xF8A size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0')
sfr (key=TRISB addr=0xF93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0')


                               # --------------#
#------------------------------# ADC Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=ADRESH addr=0xFC4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SIGN MAG' width='1 7')
sfr (key=ADRESL addr=0xFC3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='MAG' width='8')
sfr (key=ADCON0 addr=0xFC2 size=1 access='u u u u u u rw rw')
    reset (por='------00' mclr='------00')
    bit (names='- - - - - - GO/nDONE ADON')
sfr (key=ADCON1 addr=0xFC1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='x0000000' mclr='u0000000')
    bit (names='ADCOV SIZE BALC' width='1 3 4')
sfr (key=ADCON2 addr=0xFC0 size=1 access='rw u u u rw rw rw rw')
    reset (por='0---0000' mclr='0---0000')
    bit (names='C340 - - - ADCS' width='1 1 1 1 4')


                               # ---------------------#
#------------------------------# Comparator Registers #----------------------------------------------------------------------------#
                               # ---------------------#

sfr (key=CVRCON addr=0xFB5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='01111111' mclr='01111111')
    bit (names='CWI CWV' width='5 3')
sfr (key=CMCON addr=0xFB4 size=1 access='rw u u rw rw rw rw rw')
    reset (por='0--00000' mclr='0--00000')
    bit (names='CWTST - - CWVI CWCI CWDI CWIEN CWVEN')


                               # -----------------#
#------------------------------# EEPROM Registers #----------------------------------------------------------------------------#
                               # -----------------#

sfr (key=EEADR addr=0xFA9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEADR' width='8')
sfr (key=EEDATA addr=0xFA8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEDATA' width='8')
sfr (key=EECON2 addr=0xFA7 size=1 flags=w access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')
sfr (key=EECON1 addr=0xFA6 size=1 access='rw rw rs rw rw rw rs rs')
    reset (por='xx00x000' mclr='uu00u000')
    bit (names='EEPGD CFGS COMA FREE WRERR WREN WR RD')

                               # -----------------#
#------------------------------# TIMER0 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR0H addr=0xFD7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR0H' width='8')
sfr (key=TMR0L addr=0xFD6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0L' width='8')
sfr (key=T0CON addr=0xFD5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TMR0ON 16BIT T0CS T0SE PSA T0PS' width='1 1 1 1 1 3')

                               # -----------------#
#------------------------------# TIMER1 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR1H addr=0xFCF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
sfr (key=TMR1L addr=0xFCE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
sfr (key=T1CON addr=0xFCD size=1 access='rw u rw rw u rw rw rw')
    reset (por='0-00-000' mclr='u-uu-uuu')
    bit (names='RD16 - T1CKPS - nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')

                               # -----------------#
#------------------------------# TIMER2 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR2 addr=0xFCC size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
sfr (key=PR2 addr=0xFCB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
sfr (key=T2CON addr=0xFCA size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')

                               # -----------------#
#------------------------------# TIMER3 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR3H addr=0xFB3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3H' width='8')
sfr (key=TMR3L addr=0xFB2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3L' width='8')
sfr (key=T3CON addr=0xFB1 size=1 access='rw u rw rw u rw rw rw')
    reset (por='0-00-000' mclr='u-uu-uuu')
    bit (names='RD16 - T3CKPS - nT3SYNC TMR3CS TMR3ON' width='1 1 2 1 1 1 1')

                               # --------------#
#------------------------------# SSP Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=SSPBUF addr=0xFC9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
sfr (key=SSPADD addr=0xFC8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
sfr (key=SSPSTAT addr=0xFC7 size=1 access='rw rw r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF')
sfr (key=SSPCON1 addr=0xFC6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
sfr (key=SSPCON2 addr=0xFC5 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN')


                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#
#---
# CONFIG1H not used. A read from this register will yield all 0's.
#---
# CONFIG2L not used.  A read from this register will yield all 0's.
#---

cfgbits (key=CONFIG2H addr=0x300003 unused=0x0)
    field (key=WDT mask=0x1 desc="Watchdog Timer")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled-Controlled by SWDTEN bit")
#---
# CONFIG3L not used.  A read from this register will yield all 0's.
#---
cfgbits (key=CONFIG3H addr=0x300005 unused=0x0)
    field (key=MCLRE mask=0x80 desc="Master Clear Enable")
        setting (req=0x80 value=0x80 desc="MCLR enabled, RA5 input disabled")
        setting (req=0x80 value=0x00 desc="MCLR disabled, RA5 input enabled")
cfgbits (key=CONFIG4L addr=0x300006 unused=0x0)
    field (key=STVR mask=0x1 desc="Stack Overflow Reset")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
#--
#   LVP not supported on the part
#--
    field (key=BACKBUG mask=0x80 desc="Background Debug" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG5L addr=0x300008 unused=0x0)
    field (key=CP_01 mask=0x1 desc="Code Protect 000200-001FFF")
        setting (req=0x1 value=0x1 desc="Disabled")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x1 value=0x00 desc="Enabled")
            checksum (type=0x27 protregion=0x200-0x1FFF)
    field (key=CP_23 mask=0x2 desc="Code Protect 002000-003FFF")
        setting (req=0x2 value=0x2 desc="Disabled")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x2 value=0x00 desc="Enabled")
            checksum (type=0x27 protregion=0x2000-0x3FFF)
cfgbits (key=CONFIG5H addr=0x300009 unused=0x0)
    field (key=CPD mask=0x80 desc="Data EE Read Protect")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
    field (key=CPB mask=0x40 desc="Code Protect Boot")
        setting (req=0x40 value=0x40 desc="Disabled")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x40 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x0-0x1FF)
cfgbits (key=CONFIG6L addr=0x30000A unused=0x0)
    field (key=WRT_01 mask=0x1 desc="Table Write Protect 00200-01FFF")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x00 desc="Enabled")
    field (key=WRT_23 mask=0x2 desc="Table Write Protect 02000-03FFF")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x00 desc="Enabled")
cfgbits (key=CONFIG6H addr=0x30000B unused=0x0)
    field (key=WRTD mask=0x80 desc="Data EE Write Protect")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
    field (key=WRTB mask=0x40 desc="Table Write Protect Boot")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
    field (key=WRTC mask=0x20 desc="Config. Write Protect")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
cfgbits (key=CONFIG7L addr=0x30000C unused=0x0)
    field (key=EBTR_01 mask=0x1 desc="Table Read Protect 00200-01FFF")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x00 desc="Enabled")
    field (key=EBTR_23 mask=0x2 desc="Table Read Protect 002000-03FFF")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x00 desc="Enabled")
cfgbits (key=CONFIG7H addr=0x30000D unused=0x0)
    field (key=EBTRB mask=0x40 desc="Table Read Protect Boot")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")


                               # ------------#
#------------------------------# Peripherals #------------------------------------#
                               # ------------#

peripheral (key=CM)

peripheral (key=SSP)

peripheral (key=TMR0)

peripheral (key=TMR1)

peripheral (key=TMR2)

peripheral (key=TMR3)

peripheral (key=ADC)

peripheral (key=PORTA)

peripheral (key=PORTB)
