 
format=0.1

#device=PIC16F676
# DOS: DOS-00350
# PS:  DS-41191
# DS:  DS-40039

vpp (range=12.750-13.250  dflt=13.000)
vdd (range=2.500-5.500  dfltrange=3.000-5.500  nominal=5.000)

pgming (memtech=ee tries=1 lvpthresh=4.500)
    wait (pgm=2000 lvpgm=2500 eedata=6000 cfg=2500 userid=2500 erase=6000)
    latches(pgm=1 eedata=1 userid=1 cfg=1)

pgmmem (region=0x00-0x3FF)
cfgmem (region=0x2007-0x2007)
calmem (region=0x3FF-0x3FF)
userid (region=0x2000-0x2003)
devid (region=0x2006-0x2006 idmask=0x3FE0 id=0x10E0)
eedata (region=0x0-0x7f)
testmem (region=0x2000-0x20FF)
bkbgvectmem (region=0x2004-0x2004)

# NOTE: Changed banks to 2 from 4 as George feels we have a generic solution that does not require
# the banks to be added anymore.
# NOTE: Data sheet shows this as a 2 bank device. However, some registers are
# present in banks 3 and 4 to handle ICD 2 debug support. We must internally
# support this as a 4 bank device. To match the data sheets, banks 3 and 4
# will be dashed out in the displays. The language tools should treat this as
# a two bank device as well.
NumBanks=2
#UnusedRegs (0x100-0x17f)
#UnusedRegs (0x180-0x1ff)

MirrorRegs (0x0-0x0 0x80-0x80)
MirrorRegs (0x2-0x4  0x82-0x84)
MirrorRegs (0xA-0xB  0x8A-0x8B)
MirrorRegs (0x20-0x5F  0xA0-0xDF)

UnusedRegs (0x06-0x06)
UnusedRegs (0x08-0x09)
UnusedRegs (0x0d-0x0d)
UnusedRegs (0x11-0x18)
UnusedRegs (0x1a-0x1d)
UnusedRegs (0x60-0x7F)
UnusedRegs (0x86-0x86)
UnusedRegs (0x88-0x89)
UnusedRegs (0x8d-0x8d)
UnusedRegs (0x8f-0x8f)
UnusedRegs (0x92-0x94)
UnusedRegs (0x97-0x98)
UnusedRegs (0xe0-0xff)


sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=STATUS addr=0x3 size=1 access='r r rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=PORTA addr=0x5 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - RA5 RA4 RA3 RA2 RA1 RA0')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

sfr (key=PORTC addr=0x7 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - RC5 RC4 RC3 RC2 RC1 RC0')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

sfr (key=PCLATH addr=0xA size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=INTCON addr=0xB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RAIE TMR0IF INTF RAIF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR1 addr=0xC size=1 access='rw rw u u rw u u rw')
    reset (por='00--0--0' mclr='00--0--0')
    bit (names='EEIF ADIF - - CMIF - - TMR1IF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=TMR1 addr=0xE size=2 flags=j)
# The j flag means all these registers together form one larger register
    bit (names='TMR1' width='16')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=TMR1L addr=0xE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR1H addr=0xF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=T1CON addr=0x10 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-uuuuuuu')
    bit (names='- TMR1GE T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=CMCON addr=0x19 size=1 access='u r u rw rw rw rw rw')
    reset (por='-0-00000' mclr='-0-00000')
    bit (names='- COUT - CINV CIS CM' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

sfr (key=ADRESH addr=0x1E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb type=int)
sfr (key=ADCON0 addr=0x1F size=1 access='rw rw u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='ADFM VCFG - CHS GO/nDONE ADON' width='1 1 1 3 1 1')
    bit (tag=scl names='ADFM VCFG - CHS GO_nDONE ADON' width='1 1 1 3 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRAPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

sfr (key=TRISA addr=0x85 size=1 access='u u rw rw r rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)    
sfr (key=TRISC addr=0x87 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)

sfr (key=PIE1 addr=0x8C size=1 access='rw rw u u rw u u rw')
    reset (por='00--0--0' mclr='00--0--0')
    bit (names='EEIE ADIE - - CMIE - - TMR1IE')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PCON addr=0x8E size=1 access='u u u u u u rw rw')
    reset (por='------0x' mclr='------uu')
    bit (names='- - - - - - nPOR nBOR')
    stimulus (scl=rwb regfiles=w)

sfr (key=OSCCAL addr=0x90 size=1 access='rw rw rw rw rw rw u u')
    reset (por='100000--' mclr='100000--')
    bit (names='CAL - -' width='6 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=ANSEL addr=0x91 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0')
    stimulus (scl=rwb regfiles=r)
sfr (key=WPUA addr=0x95 size=1 access='u u rw rw u rw rw rw')
    reset (por='--11-111' mclr='--11-111')
    bit (names='- - WPUA5 WPUA4 - WPUA2 WPUA1 WPUA0')
    stimulus (scl=rwb regfiles=w)
sfr (key=IOCA addr=0x96 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0')
    stimulus (scl=rwb regfiles=w)
sfr (key=VRCON addr=0x99 size=1 access='rw u rw u rw rw rw rw')
    reset (por='0-0-0000' mclr='0-0-0000')
    bit (names='VREN - VRR - VR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=EEDAT addr=0x9A size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEDAT' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=EEADR addr=0x9B size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- EEADR' width='1 7')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EECON1 addr=0x9C size=1 access='u u u u rw rw rs rs')
    reset (por='----x000' mclr='----q000')
    bit (names='- - - - WRERR WREN WR RD')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EECON2 addr=0x9D size=1 flags=w access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')
sfr (key=ADRESL addr=0x9E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb type=int regfiles=r)
sfr (key=ADCON1 addr=0x9F size=1 access='u rw rw rw u u u u')
    reset (por='-000----' mclr='-000----')
    bit (names='- ADCS - - - -' width='1 3 1 1 1 1')
    stimulus (scl=rwb regfiles=w)


                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#

cfgbits (key=CONFIG addr=0x2007 unused=0x0E00)
    illegal (mask=0x48 value=0x48 msg="Current settings of PWRT and BOD are in conflict")
    field (key=OSC mask=0x7 desc="Oscillator")
        setting (req=0x7 value=0x7 desc="External RC Clockout")
        setting (req=0x7 value=0x6 desc="External RC No Clock")
        setting (req=0x7 value=0x5 desc="Internal RC Clockout")
        setting (req=0x7 value=0x4 desc="Internal RC No Clock")
        setting (req=0x7 value=0x3 desc="EC")
        setting (req=0x7 value=0x2 desc="HS")
        setting (req=0x7 value=0x1 desc="XT")
        setting (req=0x7 value=0x0 desc="LP")
    field (key=WDT mask=0x8 desc="Watchdog Timer")
        setting (req=0x8 value=0x8 desc="On")
        setting (req=0x8 value=0x0 desc="Off")
    field (key=PUT mask=0x10 desc="Power Up Timer")
        setting (req=0x10 value=0x10 desc="Off")
        setting (req=0x10 value=0x0 desc="On")
    field (key=MCLRE mask=0x20 desc="Master Clear Enable")
        setting (req=0x20 value=0x20 desc="External")
        setting (req=0x20 value=0x00 desc="Internal")
    field (key=BODEN mask=0x40 desc="Brown Out Detect")
        setting (req=0x40 value=0x40 desc="On")
        setting (req=0x40 value=0x0 desc="Off")
    field (key=CP mask=0x80 desc="Code Protect")
        setting (req=0x80 value=0x80 desc="Off")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x80 value=0x00 desc="On")
            checksum (type=0x20 protregion=0x000-0x3FE)
    field (key=CPD mask=0x100 desc="Data EE Read Protect")
        setting (req=0x100 value=0x100 desc="Off")
        setting (req=0x100 value=0x0 desc="On")
    field (key=BG mask=0x3000 desc="Bandgap Calibration Bits" flags=xh)
        setting (req=0x3000 value=0x3000 desc="Adjust Bandgap Voltage (-100mV)")
        setting (req=0x3000 value=0x1000 desc="Target Bandgap Voltage (2.1V)")
        setting (req=0x3000 value=0x3000 desc="Adjust Bandgap Voltage (50mV)")
        setting (req=0x3000 value=0x0000 desc="Adjust Bandgap Voltage (100mv)")

                               #-------------#
#------------------------------# Peripherals #------------------------------------#
                               #-------------#
#--------------------------------------------------------------------------------
# 				PORTA
#--------------------------------------------------------------------------------
peripheral (key=PORTA sfrs='TRISA PORTA IOCA' type=port)
    iopin (key=RA0 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN0)
        cnpin (key=C1INP notify=CMSINGLE)
    iopin (key=RA1 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN1)
        cnpin (key=C1INN notify=CMSINGLE)
    iopin (key=RA2 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN2)
        extint (key=INT0 enreg=INTCON enmask=0x10 flgreg=INTCON flgmask=0x02 prireg=NONE primask=0x00)
    iopin (key=RA3 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN3)
    iopin (key=RA4 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN4)
        cnpin (key=T1G notify=TMR1)
    iopin (key=RA5 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN5)

#--------------------------------------------------------------------------------
# 				PORTC
#--------------------------------------------------------------------------------

peripheral (key=PORTC sfrs='TRISC PORTC' type=port)
    iopin (key=RC0 dir=inout)
    iopin (key=RC1 dir=inout)
    iopin (key=RC2 dir=inout)
    iopin (key=RC3 dir=inout)
    iopin (key=RC4 dir=inout)
    iopin (key=RC5 dir=inout)

#--------------------------------------------------------------------------------
# 				ADC
#--------------------------------------------------------------------------------

peripheral (key=ADC10 sfrs='ADCON0 ADCON1 ANSEL ADRESL ADRESH')
    pinfunc (key=AN0 port=RA0 dir=in)
    pinfunc (key=AN1 port=RA1 dir=in)
    pinfunc (key=AN2 port=RA2 dir=in)
    pinfunc (key=AN3 port=RA4 dir=in)
    pinfunc (key=AN4 port=RC0 dir=in)
    pinfunc (key=AN5 port=RC1 dir=in)
    pinfunc (key=AN6 port=RC2 dir=in)
    pinfunc (key=AN7 port=RC3 dir=in)
    access (key=ADCON0 mode=AD_ADCON0_NO_ADCS)
    access (key=ADCON1 mode=AD_ADCS_ONLY)
    adgodone (key=ADCON0 mask=0x02)
    interrupt (name=ADC enreg=PIE1 enmask=0x40 flgreg=PIR1 flgmask=0x40 prireg=NONE primask=0x00)


#--------------------------------------------------------------------------------
# 				TIMERs
#--------------------------------------------------------------------------------
peripheral (key=TMR0 sfrs='TMR0')
    pinfunc (key=T0CKI port=RA2 dir=in)
    interrupt (name=TMR0INT enreg=INTCON enmask=0x20 flgreg=INTCON flgmask=0x04 prireg=NONE primask=0x00)

peripheral (key=TMR1 sfrs='TMR1H TMR1L T1CON')
    pinfunc (key=T1CKI port=RA5 dir=in)
    pinfunc (key=T1G port=RA4 dir=in)
    interrupt (name=TMR1INT enreg=PIE1 enmask=0x01 flgreg=PIR1 flgmask=0x01 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				CM
#--------------------------------------------------------------------------------

peripheral (key=CMSINGLE sfrs='CMCON VRCON')
    pinfunc (key=C1INP port=RA0 dir=in)
    pinfunc (key=C1INN port=RA1 dir=in)
    pinfunc (key=C1OUT port=RA2 dir=out)
    interrupt (name=CMINT enreg=PIE1 enmask=0x08 flgreg=PIR1 flgmask=0x08 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				OSC
#--------------------------------------------------------------------------------

peripheral (key=OSC)
    pinfunc (key=OSC2 port=RA4 dir=out)
        nextp (nextperiph=TMR1 nextpin=T1G)
    pinfunc (key=OSC1 port=RA5 dir=in)
        nextp (nextperiph=TMR1 nextpin=T1CKI)

#--------------------------------------------------------------------------------
# 				MCLR
#--------------------------------------------------------------------------------
peripheral (key=MCLR)
    pinfunc (key=MCLR port=RA3 dir=in)


#--------------------------------------------------------------------------------
# 				CORE
#--------------------------------------------------------------------------------
peripheral (key=CORE sfrs='EEDAT EEADR EECON1 EECON2 PCON')
    interrupt (name=EEINT enreg=PIE1 enmask=0x80 flgreg=PIR1 flgmask=0x80 prireg=NONE primask=0x00)
