
format=0.1

#device=PIC16F88
# DOS: DOS-00297
# PS:  DS-39607
# DS:  DS-30487

vpp (range=12.500-13.500  dflt=13.000)
vdd (range=2.000-5.500  dfltrange=4.500-5.500  nominal=5.000)

pgming (memtech=ee tries=1 lvpthresh=4.500)
    wait (pgm=1000 lvpgm=2000 eedata=1000 cfg=1000 userid=1000 erase=8000 lverase=2000)
    latches(pgm=4 eedata=1 userid=4 cfg=1 rowerase=32)

pgmmem (region=0x00-0xFFF)
cfgmem (region=0x2007-0x2008)
testmem (region=0x2000-0x203F)
userid (region=0x2000-0x2003)
eedata (region=0x0-0xff)
devid (region=0x2006-0x2006 idmask=0x3FE0 id=0x0760)
    ver (id=0x0760 desc="a0")
    ver (id=0x0761 desc="a1")
    ver (id=0x0762 desc="a2")
    ver (id=0x0763 desc="a3")
    ver (id=0x0764 desc="b0")
    ver (id=0x0765 desc="b1")
bkbgvectmem (region=0x2004-0x2004)

NumBanks=4
MirrorRegs (0x0-0x0  0x80-0x80  0x100-0x100  0x180-0x180)
MirrorRegs (0x1-0x1  0x101-0x101)
MirrorRegs (0x81-0x81  0x181-0x181)
MirrorRegs (0x2-0x4  0x82-0x84  0x102-0x104  0x182-0x184)
MirrorRegs (0x6-0x6  0x106-0x106)
MirrorRegs (0x86-0x86  0x186-0x186)
MirrorRegs (0xA-0xB  0x8A-0x8B  0x10A-0x10B  0x18A-0x18B)
MirrorRegs (0x70-0x7F  0xF0-0xFF  0x170-0x17F  0x1F0-0x1FF)
UnusedRegs (0x07-0x09)
UnusedRegs (0x1B-0x1D)
UnusedRegs (0x87-0x89)
UnusedRegs (0x91-0x91)
UnusedRegs (0x95-0x97)
UnusedRegs (0x9A-0x9A)
UnusedRegs (0x107-0x109)
UnusedRegs (0x185-0x185)
UnusedRegs (0x187-0x189)
UnusedRegs (0x18e-0x18f)


sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=PORTA addr=0x5 size=1 access='rw rw r rw rw rw rw rw')
    reset (por='xxx00000' mclr='uuu00000')
    bit (names='RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00xxxxxx' mclr='00uuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

sfr (key=PCLATH addr=0xA size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=INTCON addr=0xB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR1 addr=0xC size=1 access='u rw r r r rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF')
    bit (tag=scl names='- ADIF - - SSPIF CCP1IF TMR2IF TMR1IF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR2 addr=0xD size=1 access='rw rw u rw u u u u')
    reset (por='00-0----' mclr='00-0----')
    bit (names='OSFIF CMIF - EEIF - - - -')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=TMR1 addr=0xE size=2 flags=j)
# The j flag means all these registers together form one larger register
    bit (names='TMR1' width='16')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=TMR1L addr=0xE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR1H addr=0xF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=T1CON addr=0x10 size=1 access='u r rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T1RUN T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=T2CON addr=0x12 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=SSPBUF addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb type=int regfiles=rw pcfiles=rw)
sfr (key=SSPCON1 addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=CCPR1 addr=0x15 size=2 flags=j)
# The j flag means all these registers together form one larger register
    bit (names='CCPR1' width='16')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=CCPR1L addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=CCPR1H addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=CCP1CON addr=0x17 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC1B CCP1M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCSTA addr=0x18 size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG addr=0x19 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG addr=0x1A size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG' width='8')
    stimulus (scl=rb regfiles=rp)

sfr (key=ADRESH addr=0x1E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb type=int)
sfr (key=ADCON0 addr=0x1F size=1 access='rw rw rw rw rw rw u rw')
    reset (por='000000-0' mclr='000000-0')
    bit (names='ADCS CHS GO/nDONE - ADON' width='2 3 1 1 1')
    bit (tag=scl names='ADCS CHS GO_nDONE - ADON' width='2 3 1 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='rw rw u rw rw rw rw rw')
    reset (por='11-11111' mclr='11-11111')
    bit (names='TRISA7 TRISA6 - TRISA4 TRISA3 TRISA2 TRISA1 TRISA0')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)    
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)    

sfr (key=PIE1 addr=0x8C size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIE2 addr=0x8D size=1 access='rw rw u rw u u u u')
    reset (por='00-0----' mclr='00-0----')
    bit (names='OSFIE CMIE - EEIE - - - -')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PCON addr=0x8E size=1 access='u u u u u u rw rw')
    reset (por='------qq' mclr='------uu')
    bit (names='- - - - - - nPOR nBOR')
    stimulus (scl=rwb regfiles=w)
sfr (key=OSCCON addr=0x8F size=1 access='u rw rw rw r r rw rw')
    reset (por='-0000000' mclr='-xxxxxxx')
    bit (names='- IRCF OSTS FLTS SCS' width='1 3 1 1 2')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=OSCTUNE addr=0x90 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--xxxxxx')
    bit (names='- - TUN' width='1 1 6')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=PR2 addr=0x92 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=SSPADD addr=0x93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
# Bits are rw so they can be simulated
# sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw r r r r r r')
sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF')

sfr (key=TXSTA addr=0x98 size=1 access='rw rw rw rw u rw r rw')
    reset (por='0000-010' mclr='0000-010')
    bit (names='CSRC TX9 TXEN SYNC - BRGH TRMT TX9D')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRG addr=0x99 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG' width='8')
    stimulus (scl=rwb regfiles=w)

sfr (key=ANSEL addr=0x9B size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-1111111' mclr='-xxxxxxx')
    bit (names='- ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0')
    stimulus (scl=rwb regfiles=r)
sfr (key=CMCON addr=0x9C size=1 access='r r rw rw rw rw rw rw')
    reset (por='00000111' mclr='00000111')
    bit (names='C2OUT C1OUT C2INV C1INV CIS CM' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=CVRCON addr=0x9D size=1 access='rw rw rw u rw rw rw rw')
    reset (por='000-0000' mclr='000-0000')
    bit (names='CVREN CVROE CVRR - CVR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRESL addr=0x9E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb type=int regfiles=r)
sfr (key=ADCON1 addr=0x9F size=1 access='rw rw rw rw u u u u')
    reset (por='0000----' mclr='xxxx----')
    bit (names='ADFM ADCS2 VCFG - - - -' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=WDTCON addr=0x105 size=1 access='u u u rw rw rw rw rw')
    reset (por='---01000' mclr='---xxxxx')
    bit (names='- - - WDTPS SWDTEN' width='1 1 1 4 1')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=EEDATA addr=0x10C size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='EEDATA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=EEADR addr=0x10D size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='EEADR' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EEDATH addr=0x10E size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--xxxxxx')
    bit (names='- - EEDATH' width='1 1 6')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=EEADRH addr=0x10F size=1 access='u u u u rw rw rw rw')
    reset (por='----xxxx' mclr='----xxxx')
    bit (names='- - - - EEADRH' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=EECON1 addr=0x18C size=1 access='rw u u rw rw rw rs rs')
    reset (por='x--xx000' mclr='x--xx000')
    bit (names='EEPGD - - FREE WRERR WREN WR RD')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EECON2 addr=0x18D size=1 flags=w access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')



                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#

cfgbits (key=CONFIG addr=0x2007 unused=0x00)
    field (key=OSC mask=0x13 desc="Oscillator")
        setting (req=0x13 value=0x13 desc="EXTRC-OSC2 as Clock Out" freqmin=32000 freqmax=4000000)
        setting (req=0x13 value=0x12 desc="EXTRC-OSC2 as RA6" freqmin=32000 freqmax=4000000)
        setting (req=0x13 value=0x11 desc="INTRC-OSC2 as Clock Out")
        setting (req=0x13 value=0x10 desc="INTRC-OSC2 as RA6")
        setting (req=0x13 value=0x03 desc="EXTCLK as Port IO" freqmin=32000 freqmax=40000000)
        setting (req=0x13 value=0x00 desc="LP" freqmin=32000 freqmax=200000)
        setting (req=0x13 value=0x01 desc="XT" freqmin=200000 freqmax=4000000)
        setting (req=0x13 value=0x02 desc="HS" freqmin=4000000 freqmax=25000000)
    field (key=WDT mask=0x4 desc="Watchdog Timer" min=1)
        setting (req=0x4 value=0x4 desc="On")
        setting (req=0x4 value=0x0 desc="Off")
    field (key=PUT mask=0x8 desc="Power Up Timer")
        setting (req=0x8 value=0x8 desc="Off")
        setting (req=0x8 value=0x0 desc="On")
    field (key=MCLRE mask=0x20 desc="RA5/MCLR Pin Function Select")
        setting (req=0x20 value=0x20 desc="MCLR")
        setting (req=0x20 value=0x0 desc="RA5")
    field (key=BODEN mask=0x40 desc="Brown Out Detect")
        setting (req=0x40 value=0x40 desc="On")
        setting (req=0x40 value=0x0 desc="Off")
    field (key=LVP mask=0x80 desc="Low Voltage Program")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x0 desc="Disabled")
    field (key=CPD mask=0x100 desc="Data EE Read Protect")
        setting (req=0x100 value=0x100 desc="Off")
        setting (req=0x100 value=0x0 desc="On")
    field (key=WRT_ENABLE mask=0x600 desc="Flash Program Write")
        setting (req=0x600 value=0x600 desc="Write Protect Off")
        setting (req=0x600 value=0x400 desc="0000 to 00FF write protected")
        setting (req=0x600 value=0x200 desc="0000 to 07FF write protected")
        setting (req=0x600 value=0x0 desc="0000 to 0FFF write protected")
    field (key=BACKBUG mask=0x800 desc="Background Debug" flags=h)
        setting (req=0x800 value=0x800 desc="Disabled")
        setting (req=0x800 value=0x0 desc="Enabled")
    field (key=CCP1MUX mask=0x1000 desc="CCP1 Mux")
        setting (req=0x1000 value=0x1000 desc="RB0")
        setting (req=0x1000 value=0x0 desc="RB3")
    field (key=CP mask=0x2000 desc="Code Protect")
        setting (req=0x2000 value=0x2000 desc="Off")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x2000 value=0x0 desc="All")
            checksum (type=0x20 protregion=0x0-0x0FFF)
cfgbits (key=CONFIG2 addr=0x2008 unused=0x3FFC)
    field (key=FCMEN mask=0x1 desc="Fail-Safe Clock Monitor Enable")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
    field (key=IESO mask=0x2 desc="Internal External Switch Over Mode")
        setting (req=0x2 value=0x2 desc="Enabled")
        setting (req=0x2 value=0x0 desc="Disabled")


                               #-------------#
#------------------------------# Peripherals #------------------------------------#
                               #-------------#
#--------------------------------------------------------------------------------
# 				PORTA
#--------------------------------------------------------------------------------
peripheral (key=PORTA sfrs='TRISA PORTA' type=port)
    iopin (key=RA0 dir=inout)
        cnpin (key=C1INN notify=CM)
    iopin (key=RA1 dir=inout)
        cnpin (key=C2INN notify=CM)
    iopin (key=RA2 dir=inout)
        cnpin (key=C2INP notify=CM)
    iopin (key=RA3 dir=inout)
        cnpin (key=C1INP notify=CM)
    iopin (key=RA4 dir=inout)
    iopin (key=RA5 dir=inout)
    iopin (key=RA6 dir=inout)
    iopin (key=RA7 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTB
#--------------------------------------------------------------------------------
peripheral (key=PORTB sfrs='TRISB PORTB' type=port)
    iopin (key=RB0 dir=inout)
        extint (key=INT0 enreg=INTCON enmask=0x10 flgreg=INTCON flgmask=0x02 prireg=NONE primask=0x00)
        cnpin (key=CCP1CN notify=CCP1)
    iopin (key=RB1 dir=inout)
    iopin (key=RB2 dir=inout)
    iopin (key=RB3 dir=inout)
        cnpin (key=CCP1CN2 notify=CCP1)
    iopin (key=RB4 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=PORTIOC0)
    iopin (key=RB5 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=PORTIOC0)
    iopin (key=RB6 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=PORTIOC0)
    iopin (key=RB7 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=PORTIOC0)

#--------------------------------------------------------------------------------
# 				ADC
#--------------------------------------------------------------------------------

peripheral (key=ADC10 sfrs='ADCON0 ADCON1 ANSEL ADRESL ADRESH')
    pinfunc (key=AN0 port=RA0 dir=in)
    pinfunc (key=AN1 port=RA1 dir=in)
    pinfunc (key=AN2 port=RA2 dir=in)
    pinfunc (key=AN3 port=RA3 dir=in)
        nextp (nextperiph=CM nextpin=C1OUT)
    pinfunc (key=AN4 port=RA5 dir=in)
        nextp (nextperiph=TMR0 nextpin=T0CKI)
    pinfunc (key=AN5 port=RB6 dir=in)
        nextp (nextperiph=TMR1 nextpin=T1CKI)
    pinfunc (key=AN6 port=RB7 dir=in)
    access (key=ADCON0 mode=AD_3BIT_ADCS)
    access (key=ADCON1 mode=AD_FMT_ADCS)
    interrupt (name=ADC enreg=PIE1 enmask=0x40 flgreg=PIR1 flgmask=0x40 prireg=NONE primask=0x00)
#--------------------------------------------------------------------------------
# 				UARTs
#--------------------------------------------------------------------------------

peripheral (key=UART1 sfrs='SPBRG RCREG TXREG TXSTA RCSTA')
    pinfunc (key=U1RX port=RB2 dir=in)
    pinfunc (key=U1TX port=RB5 dir=out)
    interrupt (name=RXINT1 enreg=PIE1 enmask=0x20 flgreg=PIR1 flgmask=0x20 prireg=NONE primask=0x00)
    interrupt (name=TXINT1 enreg=PIE1 enmask=0x10 flgreg=PIR1 flgmask=0x10 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				TIMERs
#--------------------------------------------------------------------------------
peripheral (key=TMR0 sfrs='TMR0')
    pinfunc (key=T0CKI port=RA4 dir=in)
        nextp (nextperiph=CM nextpin=C2OUT)
    interrupt (name=TMR0INT enreg=INTCON enmask=0x20 flgreg=INTCON flgmask=0x04 prireg=NONE primask=0x00)

peripheral (key=TMR1 sfrs='TMR1H TMR1L T1CON')
    pinfunc (key=T1CKI port=RB6 dir=in)
    interrupt (name=TMR1INT enreg=PIE1 enmask=0x01 flgreg=PIR1 flgmask=0x01 prireg=NONE primask=0x00)

peripheral (key=TMR2 sfrs='TMR2 PR2 T2CON')
    interrupt (name=TMR2INT enreg=PIE1 enmask=0x02 flgreg=PIR1 flgmask=0x02 prireg=NONE primask=0x00)
 
#--------------------------------------------------------------------------------
# 				CCP
#--------------------------------------------------------------------------------

peripheral (key=CCP1 sfrs='CCP1CON CCPR1L CCPR1H')
    pinfunc (key=CCP1 port=multi dir=inout)
        portpins (muxaddr=0x2007 muxmask=0x1000)
            setting (muxval=0x1000 port=RB0 dir=inout)
            setting (muxval=0x0 port=RB3 dir=inout)
    interrupt (name=CCP1INT enreg=PIE1 enmask=0x04 flgreg=PIR1 flgmask=0x04 prireg=NONE primask=0x00)
    specialevent (key=ADC)
    timers (addr=0x0 mask=0x00)
        setting (val=0x00 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)

#--------------------------------------------------------------------------------
# 				CM
#--------------------------------------------------------------------------------

peripheral (key=CM sfrs='CMCON CVRCON')
    pinfunc (key=C1INP port=RA3 dir=in)
    pinfunc (key=C1INN port=RA0 dir=in)
    pinfunc (key=C1OUT port=RA3 dir=inout)
    pinfunc (key=C2INP port=RA2 dir=in)
    pinfunc (key=C2INN port=RA1 dir=in)
    pinfunc (key=C2OUT port=RA4 dir=inout)
    interrupt (name=CMINT enreg=PIE2 enmask=0x40 flgreg=PIR2 flgmask=0x40 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				OSC
#--------------------------------------------------------------------------------

peripheral (key=OSC sfrs='OSCCON')
    pinfunc (key=OSC2 port=RA6 dir=out)
    pinfunc (key=OSC1 port=RA7 dir=in)
    pinfunc (key=T1OSCI port=RB7 dir=in)
        nextp (nextperiph=ADC10 nextpin=AN6)
    pinfunc (key=T1OSCO port=RB6 dir=out)
        nextp (nextperiph=ADC10 nextpin=AN5)

#--------------------------------------------------------------------------------
# 				MCLR
#--------------------------------------------------------------------------------
peripheral (key=MCLR)
    pinfunc (key=MCLR port=RA5 dir=in)


peripheral (key=I2C)



#--------------------------------------------------------------------------------
# 				CORE
#--------------------------------------------------------------------------------
peripheral (key=CORE sfrs='EEDATA EEDATH EEADR EEADRH EECON1 EECON2 PCON WDTCON')
    interrupt (name=EEINT enreg=PIE2 enmask=0x10 flgreg=PIR2 flgmask=0x10 prireg=NONE primask=0x00)
