
format=0.1

#device=PIC18C601
# DOS: DOS-00046
# PS:  DS-39028
# DS:  DS-39541

vpp (range=12.750-13.250 dflt=13.000)
vdd (range=2.500-5.500 dfltrange=4.250-5.500 nominal=5.000)

pgming (memtech=romless tries=1)
    wait (cfg=1000 userid=1000)

cfgmem (region=0x300000-0x300007)
extpgmmem (region=0x00-0x3FFFF)
bootmem (region=0x1FFE00-0x1FFFFF)
devid (region=0x3FFFFE-0x3FFFFF idmask=0xFFE0 id=0x0120)
    ver (id=0x0120 desc="a0")
    ver (id=0x0121 desc="b0")
    ver (id=0x0122 desc="b1")
    ver (id=0x0123 desc="c0")

NumBanks=16
AccessBankSplitOffset=0x80
UnusedBankMask=0x7FC0

UnusedRegs (0xf00-0xf7f)
UnusedRegs (0xf87-0xf88)
UnusedRegs (0xf90-0xf91)
UnusedRegs (0xf99-0xf9b)
UnusedRegs (0xfa3-0xfa5)
UnusedRegs (0xfa8-0xfaa)
UnusedRegs (0xfb4-0xfb5)
UnusedRegs (0xfb6-0xfb9)

                               # ---------------#
#------------------------------# CORE Registers #------------------------------------------------#
                               # ---------------#

sfr (key=TOS addr=0xFFD size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - TOS' width='1 1 1 21')
sfr (key=TOSU addr=0xFFF size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - TOSU' width='1 1 1 5')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=TOSH addr=0xFFE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSH' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=TOSL addr=0xFFD size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=STKPTR addr=0xFFC size=1 access='rc rc u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='STKFUL STKUNF - STKPTR' width='1 1 1 5')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=PCLAT addr=0xFF9 size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - PCLAT' width='1 1 1 21')
sfr (key=PCLATU addr=0xFFB size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCU' width='1 1 1 5')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PCLATH addr=0xFFA size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCH' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PCL addr=0xFF9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=TBLPTR addr=0xFF6 size=3 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - TBLPTR' width='1 1 1 21')
sfr (key=TBLPTRU addr=0xFF8 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - - TBLPTRU' width='1 1 1 5')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=TBLPTRH addr=0xFF7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRH' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=TBLPTRL addr=0xFF6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=TABLAT addr=0xFF5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TABLAT' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=PROD addr=0xFF3 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='PROD' width='16')
sfr (key=PRODH addr=0xFF4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODH' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PRODL addr=0xFF3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=INTCON addr=0xFF2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    # NOTE: When IPEN (bit 7) in the RCON register is 0 use the following bit names
    qbit (names='GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    # NOTE: When IPEN (bit 7) in the RCON register is 1 use the following bit names
    qbit (names='GIEH GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    bit (tag=scl names='GIE_GIEH PEIE_GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=INTCON2 addr=0xFF1 size=1 access='rw rw rw rw u rw u rw')
    reset (por='1111-1-1' mclr='1111-1-1')
    bit (names='nRBPU INTEDG0 INTEDG1 INTEDG2 - TMR0IP - RBIP')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=INTCON3 addr=0xFF0 size=1 access='rw rw u rw rw u rw rw')
    reset (por='11-00-00' mclr='11-00-00')
    bit (names='INT2IP INT1IP - INT2IE INT1IE - INT2IF INT1IF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=INDF0 addr=0xFEF size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF0' width='8')
sfr (key=POSTINC0 addr=0xFEE size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC0' width='8')
sfr (key=POSTDEC0 addr=0xFED size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC0' width='8')
sfr (key=PREINC0 addr=0xFEC size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC0' width='8')
sfr (key=PLUSW0 addr=0xFEB size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW0' width='8')

sfr (key=FSR0 addr=0xFE9 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - - FSR0' width='1 1 1 1 12')
sfr (key=FSR0H addr=0xFEA size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR0H' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=FSR0L addr=0xFE9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR0L' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=WREG addr=0xFE8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='WREG' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=INDF1 addr=0xFE7 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF1' width='8')
sfr (key=POSTINC1 addr=0xFE6 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC1' width='8')
sfr (key=POSTDEC1 addr=0xFE5 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC1' width='8')
sfr (key=PREINC1 addr=0xFE4 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC1' width='8')
sfr (key=PLUSW1 addr=0xFE3 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW1' width='8')

sfr (key=FSR1 addr=0xFE1 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - - FSR1' width='1 1 1 1 12')
sfr (key=FSR1H addr=0xFE2 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR1H' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=FSR1L addr=0xFE1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR1L' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=BSR addr=0xFE0 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BSR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=INDF2 addr=0xFDF size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF2' width='8')
sfr (key=POSTINC2 addr=0xFDE size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC2' width='8')
sfr (key=POSTDEC2 addr=0xFDD size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC2' width='8')
sfr (key=PREINC2 addr=0xFDC size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC2' width='8')
sfr (key=PLUSW2 addr=0xFDB size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW2' width='8')

sfr (key=FSR2 addr=0xFD9 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='- - - - FSR2' width='1 1 1 1 12')
sfr (key=FSR2H addr=0xFDA size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR2H' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=FSR2L addr=0xFD9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR2L' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=STATUS addr=0xFD8 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - N OV Z DC C')
sfr (key=OSCCON addr=0xFD3 size=1 access='u u u u rw rw rw rw')
# The reset values are inconsistent in the Data Sheet
# so these values might be incorrect.
    reset (por='----0000' mclr='----uuu0')
    bit (names='- - - - LOCK PLLEN SCS' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=LVDCON addr=0xFD2 size=1 access='u u r rw rw rw rw rw')
    reset (por='--000101' mclr='--000101')
    bit (names='- - IRVST LVDEN LVDL' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=WDTCON addr=0xFD1 size=1 access='u u u u rw rw rw rw')
# The reset values are inconsistent in the Data Sheet
# so these values might be incorrect.
    reset (por='----0000' mclr='----xxxx')
    bit (names='- - - - SWDPS SWDTEN' width='1 1 1 1 3 1')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=RCON addr=0xFD0 size=1 access='rw u u rw rw rw rw rw')
# The reset values are inconsistent in the Data Sheet
# so these values might be incorrect.
    reset (por='0--11100' mclr='0--qqquu')
    bit (names='IPEN - - nRI nTO nPD nPOR nBOR')
    stimulus (scl=r regfiles=w pcfiles=rw)

sfr (key=CSEL2 addr=0xFA7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='uuuuuuuu')
    bit (names='CSL' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=CSELIO addr=0xFA6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='uuuuuuuu')
    bit (names='CSIO' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

sfr (key=IPR2 addr=0xFA2 size=1 access='u u u u rw rw rw rw')
    reset (por='----1111' mclr='----1111')
    bit (names='- - - - BCLIP LVDIP TMR3IP CCP2IP')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR2 addr=0xFA1 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BCLIF LVDIF TMR3IF CCP2IF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIE2 addr=0xFA0 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BCLIE LVDIE TMR3IE CCP2IE')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=IPR1 addr=0xF9F size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-1111111' mclr='-1111111')
    bit (names='- ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR1 addr=0xF9E size=1 access='u rw r r rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF')
    bit (tag=scl names='- ADIF - - SSPIF CCP1IF TMR2IF TMR1IF')
	stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIE1 addr=0xF9D size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=MEMCON addr=0xF9C size=1 access='rw rw rw rw u u rw rw')
    reset (por='0000--00' mclr='0000--00')
    bit (names='EBDIS PGRM WAIT - - WM' width='1 1 2 1 1 2')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

                               # ----------------#
#------------------------------# PORTA Registers #-------------------------------------------------#
                               # ----------------#

sfr (key=PORTA addr=0xF80 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--0x0000' mclr='--0u0000')
    bit (names='- - RA5 RA4 RA3 RA2 RA1 RA0')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=LATA addr=0xF89 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - LATA5 LATA4 LATA3 LATA2 LATA1 LATA0')
    bit (tag=scl names='LATA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0xF92 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTB Registers #-----------------------------------------------------------------------------------------#
                               # ----------------#

sfr (key=PORTB addr=0xF81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=TRISB addr=0xF93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATB addr=0xF8A size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0')
    bit (tag=scl names='LATB' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTC Registers #---------------------------------------#
                               # ----------------#

sfr (key=PORTC addr=0xF82 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=LATC addr=0xF8B size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATC7 LATC6 LATC5 LATC4 LATC3 LATC2 LATC1 LATC0')
    bit (tag=scl names='LATC' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0xF94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTD Registers #-----------------------------------------------------------------------------------------#
                               # ----------------#

sfr (key=PORTD addr=0xF83 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0')
    bit (tag=scl names='RD' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=LATD addr=0xF8C size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0')
    bit (tag=scl names='LATD' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISD addr=0xF95 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0')
    bit (tag=scl names='TRISD' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTE Registers #------------------------------------------------------#
                               # ----------------#

sfr (key=PORTE addr=0xF84 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0')
    bit (tag=scl names='RE' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=LATE addr=0xF8D size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0')
    bit (tag=scl names='LATE' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISE addr=0xF96 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0')
    bit (tag=scl names='TRISE' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTF Registers #-------------------------------------------------#
                               # ----------------#

sfr (key=PORTF addr=0xF85 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='x0000000' mclr='u0000000')
    bit (names='RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF0')
    bit (tag=scl names='RF' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=LATF addr=0xF8E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATF7 LATF6 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0')
    bit (tag=scl names='LATF' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISF addr=0xF97 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0')
    bit (tag=scl names='TRISF' width='8')
    stimulus (scl=rwb regfiles=w)

                               # ----------------#
#------------------------------# PORTG Registers #-------------------------------------------------#
                               # ----------------#

sfr (key=PORTG addr=0xF86 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - RG4 RG3 RG2 RG1 RG0')
    bit (tag=scl names='RG' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=TRISG addr=0xF98 size=1 access='u u u rw rw rw rw rw')
    reset (por='---11111' mclr='---11111')
    bit (names='- - - TRISG4 TRISG3 TRISG2 TRISG1 TRISG0')
    bit (tag=scl names='TRISG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATG addr=0xF8F size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - LATG4 LATG3 LATG2 LATG1 LATG0')
    bit (tag=scl names='LATG' width='8')
    stimulus (scl=rwb regfiles=w)

                               # --------------#
#------------------------------# ADC Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=ADRES addr=0xFC3 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='ADRES' width='16')
sfr (key=ADRESH addr=0xFC4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=ADRESL addr=0xFC3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb type=int regfiles=r)

sfr (key=ADCON0 addr=0xFC2 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - CHS GO/nDONE ADON' width='1 1 4 1 1')
    bit (tag=scl names='- - CHS GO_nDONE ADON' width='1 1 4 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON1 addr=0xFC1 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--00qqqq' mclr='--000000')
    bit (names='- - VCFG PCFG' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON2 addr=0xFC0 size=1 access='rw u u u u rw rw rw')
    reset (por='0----000' mclr='0----000')
    bit (names='ADFM - - - - ADCS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

                               # --------------#
#------------------------------# CCP Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=CCPR1 addr=0xFBE size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='CCPR1' width='16')
sfr (key=CCPR1H addr=0xFBF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=CCPR1L addr=0xFBE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w)

sfr (key=CCP1CON addr=0xFBD size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC1B CCP1M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)

sfr (key=CCPR2 addr=0xFBB size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='CCPR2' width='16')
sfr (key=CCPR2H addr=0xFBC size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2H' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=CCPR2L addr=0xFBB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2L' width='8')
    stimulus (scl=rwb type=int regfiles=w)

sfr (key=CCP2CON addr=0xFBA size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC2B CCP2M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)

                               # --------------#
#------------------------------# SSP Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=SSPBUF addr=0xFC9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=SSPADD addr=0xFC8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
# All bits are rw so they can be simulated
# sfr (key=SSPSTAT addr=0xFC7 size=1 access='rw rw r r r r r r')
sfr (key=SSPSTAT addr=0xFC7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF')
#    bit (tag=scl names='SMP CKE D_nA P S R_nW UA BF')
sfr (key=SSPCON1 addr=0xFC6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=SSPCON2 addr=0xFC5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

                               # -----------------#
#------------------------------# TIMER0 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR0 addr=0xFD6 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='TMR0' width='16')
sfr (key=TMR0H addr=0xFD7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR0H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR0L addr=0xFD6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)

sfr (key=T0CON addr=0xFD5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TMR0ON T08BIT T0CS T0SE PSA T0PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

                               # -----------------#
#------------------------------# TIMER1 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR1 addr=0xFCE size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='TMR1' width='16')
sfr (key=TMR1H addr=0xFCF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR1L addr=0xFCE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)

sfr (key=T1CON addr=0xFCD size=1 access='rw u rw rw rw rw rw rw')
    reset (por='0-000000' mclr='u-uuuuuu')
    bit (names='RD16 - T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

                               # -----------------#
#------------------------------# TIMER2 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR2 addr=0xFCC size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=PR2 addr=0xFCB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=T2CON addr=0xFCA size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)

                               # -----------------#
#------------------------------# TIMER3 Registers #-------------------------------------------------#
                               # -----------------#

sfr (key=TMR3 addr=0xFB2 size=2 flags=j)
    # NOTE: The j flag means all these registers together form one larger register
    bit (names='TMR3' width='16')
sfr (key=TMR3H addr=0xFB3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR3L addr=0xFB2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)

sfr (key=T3CON addr=0xFB1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='uuuuuuuu')
    bit (names='RD16 T3CCP2 T3CKPS T3CCP1 nT3SYNC TMR3CS TMR3ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

                               # --------------#
#------------------------------# PSP Registers #----------------------------------------------------------------------------#
                               # --------------#

sfr (key=PSPCON addr=0xFB0 size=1 access='u u u u u u w w')
    reset (por='------00' mclr='------00')
    bit (names='- - - - - - CMLK' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

                               # ---------------#
#------------------------------# UART Registers #-------------------------------------------------#
                               # ---------------#

sfr (key=SPBRG addr=0xFAF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG addr=0xFAE size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG' width='8')
    stimulus (scl=rb regfiles=rp)
sfr (key=TXREG addr=0xFAD size=1 access='w w w w w w w w')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA addr=0xFAC size=1 access='rw rw rw rw u rw r rw')
    reset (por='0000-010' mclr='0000-010')
    bit (names='CSRC TX9 TXEN SYNC - BRGH TRMT TX9D')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCSTA addr=0xFAB size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D')
    stimulus (scl=rwb regfiles=w)

                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#

cfgbits (key=CONFIG1H addr=0x300001 unused=0x0)
    field (key=OSC mask=0x3 desc="Oscillator")
        setting (req=0x3 value=0x3 desc="RC" freqmin=32000 freqmax=4000000)
        setting (req=0x3 value=0x2 desc="HS" freqmin=4000000 freqmax=25000000)
        setting (req=0x3 value=0x1 desc="EC" freqmin=32000 freqmax=40000000)
        setting (req=0x3 value=0x0 desc="LP" freqmin=32000 freqmax=200000)
cfgbits (key=CONFIG2L addr=0x300002 unused=0x0)
    field (key=PUT mask=0x1 desc="Power Up Timer")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=BUS mask=0x40 desc="Bus Width")
        setting (req=0x40 value=0x40 desc="16 Bit")
        setting (req=0x40 value=0x0 desc="8 Bit")
cfgbits (key=CONFIG2H addr=0x300003 unused=0x0)
    field (key=WDT mask=0x1 desc="Watchdog Timer")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
    field (key=WDTPS mask=0xE desc="Watchdog Postscaler")
#--
#  The following values for the settings are correct.
#  Do NOT revise them to the values in the latest 
#  DataSheet because those values are wrong.  The 
#  DataSheet was never corrected because this is 
#  an older part.
#--
        setting (req=0xE value=0xE desc="1:128")
        setting (req=0xE value=0xC desc="1:64")
        setting (req=0xE value=0xA desc="1:32")
        setting (req=0xE value=0x8 desc="1:16")
        setting (req=0xE value=0x6 desc="1:8")
        setting (req=0xE value=0x4 desc="1:4")
        setting (req=0xE value=0x2 desc="1:2")
        setting (req=0xE value=0x0 desc="1:1")
cfgbits (key=CONFIG4L addr=0x300006 unused=0x0)
#--
#  This BACKBUG configuration bit is reserved 
#  on the DataSheet, ICD2 uses this bit.
    field (key=BACKBUG mask=0x80 desc="Background Debug" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
#--
    field (key=STVR mask=0x1 desc="Stack Overflow Reset")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")

                               # ------------#
#------------------------------# Peripherals #------------------------------------#
                               # ------------#

#--------------------------------------------------------------------------------
# 				TIMERs
#--------------------------------------------------------------------------------

peripheral18 (key=TMR0 sfrs='TMR0H TMR0L T0CON')
    pinfunc (key=T0CKI port=RA4 dir=in)
    interrupt (name=TMR0INT enreg=INTCON enmask=0x20 flgreg=INTCON flgmask=0x04 prireg=INTCON2 primask=0x04)

peripheral18 (key=TMR1 sfrs='TMR1H TMR1L T1CON')
    pinfunc (key=T1CKI port=RC0 dir=in)
    interrupt (name=TMR1INT enreg=PIE1 enmask=0x01 flgreg=PIR1 flgmask=0x01 prireg=IPR1 primask=0x01)

peripheral18 (key=TMR2 sfrs='TMR2 PR2 T2CON')
    interrupt (name=TMR2INT enreg=PIE1 enmask=0x02 flgreg=PIR1 flgmask=0x02 prireg=IPR1 primask=0x02)

peripheral18 (key=TMR3 sfrs='TMR3H TMR3L T3CON')
    pinfunc (key=T3CKI port=RC0 dir=in)
    interrupt (name=TMR3INT enreg=PIE2 enmask=0x02 flgreg=PIR2 flgmask=0x02 prireg=IPR2 primask=0x02)

#--------------------------------------------------------------------------------
# 				ADC
#--------------------------------------------------------------------------------

peripheral18 (key=ADC sfrs='ADCON0 ADCON1 ADCON2 ADRESL ADRESH')
    pinfunc (key=AN0 port=RA0 dir=in)
    pinfunc (key=AN1 port=RA1 dir=in)
    pinfunc (key=AN2 port=RA2 dir=in)
    pinfunc (key=AN3 port=RA3 dir=in)
    pinfunc (key=AN4 port=RA5 dir=in)
    pinfunc (key=AN5 port=RF0 dir=in)
    pinfunc (key=AN6 port=RF1 dir=in)
    pinfunc (key=AN7 port=RF2 dir=in)
    access (key=ADCON1 mode=AD_PCFG_HEXSEL)
    access (key=ADCON2 mode=AD_NO_ACQUISITION)
    interrupt (name=ADC enreg=PIE1 enmask=0x40 flgreg=PIR1 flgmask=0x40 prireg=IPR1 primask=0x40)

#--------------------------------------------------------------------------------
# 				UARTs
#--------------------------------------------------------------------------------

peripheral18 (key=UART1 sfrs='SPBRG RCREG TXREG TXSTA RCSTA')
    pinfunc (key=U1RX port=RC7 dir=in)
    pinfunc (key=U1TX port=RC6 dir=out)
    interrupt (name=RXINT1 enreg=PIE1 enmask=0x20 flgreg=PIR1 flgmask=0x20 prireg=IPR1 primask=0x20)
    interrupt (name=TXINT1 enreg=PIE1 enmask=0x10 flgreg=PIR1 flgmask=0x10 prireg=IPR1 primask=0x10)

#--------------------------------------------------------------------------------
# 				PORTA
#--------------------------------------------------------------------------------

peripheral18 (key=PORTA sfrs='TRISA LATA PORTA' type=port)
    iopin (key=RA0 dir=inout)
    iopin (key=RA1 dir=inout)
    iopin (key=RA2 dir=inout)
    iopin (key=RA3 dir=inout)
    iopin (key=RA4 dir=inout)
    iopin (key=RA5 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTB
#--------------------------------------------------------------------------------

peripheral18 (key=PORTB sfrs='TRISB LATB PORTB' type=port)
    iopin (key=RB0 dir=inout)
        extint (key=INT0 enreg=INTCON enmask=0x10 flgreg=INTCON flgmask=0x02 prireg=NONE primask=0x00)
    iopin (key=RB1 dir=inout)
        extint (key=INT1 enreg=INTCON3 enmask=0x08 flgreg=INTCON3 flgmask=0x01 prireg=INTCON3 primask=0x40)
    iopin (key=RB2 dir=inout)
        extint (key=INT2 enreg=INTCON3 enmask=0x10 flgreg=INTCON3 flgmask=0x02 prireg=INTCON3 primask=0x80)
    iopin (key=RB3 dir=inout)
        cnpin (key=CCP2CN notify=CCP2)
    iopin (key=RB4 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI0)
    iopin (key=RB5 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI0)
    iopin (key=RB6 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI0)
    iopin (key=RB7 dir=inout)
        cnint (key=KBIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=INTCON2 primask=0x01 cnkey=KBI0)

#--------------------------------------------------------------------------------
# 				PORTC
#--------------------------------------------------------------------------------

peripheral18 (key=PORTC sfrs='TRISC LATC PORTC' type=port)
    iopin (key=RC0 dir=inout)
    iopin (key=RC1 dir=inout)
        cnpin (key=CCP2CN notify=CCP2)
    iopin (key=RC2 dir=inout)
        cnpin (key=CCP1CN notify=CCP1)
    iopin (key=RC3 dir=inout)
    iopin (key=RC4 dir=inout)
    iopin (key=RC5 dir=inout)
    iopin (key=RC6 dir=inout)
    iopin (key=RC7 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTD
#--------------------------------------------------------------------------------

peripheral18 (key=PORTD sfrs='TRISD LATD PORTD' type=port)
    iopin (key=RD0 dir=inout)
    iopin (key=RD1 dir=inout)
    iopin (key=RD2 dir=inout)
    iopin (key=RD3 dir=inout)
    iopin (key=RD4 dir=inout)
    iopin (key=RD5 dir=inout)
    iopin (key=RD6 dir=inout)
    iopin (key=RD7 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTE
#--------------------------------------------------------------------------------

peripheral18 (key=PORTE sfrs='TRISE LATE PORTE' type=port)
    iopin (key=RE0 dir=inout)
    iopin (key=RE1 dir=inout)
    iopin (key=RE2 dir=inout)
    iopin (key=RE3 dir=inout)
    iopin (key=RE4 dir=inout)
    iopin (key=RE5 dir=inout)
    iopin (key=RE6 dir=inout)
    iopin (key=RE7 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTF
#--------------------------------------------------------------------------------

peripheral18 (key=PORTF sfrs='TRISF LATF PORTF' type=port)
    iopin (key=RF0 dir=inout)
    iopin (key=RF1 dir=inout)
    iopin (key=RF2 dir=inout)
    iopin (key=RF3 dir=inout)
    iopin (key=RF4 dir=inout)
    iopin (key=RF5 dir=inout)
    iopin (key=RF6 dir=inout)
    iopin (key=RF7 dir=inout)

#--------------------------------------------------------------------------------
# 				PORTG
#--------------------------------------------------------------------------------

peripheral18 (key=PORTG sfrs='TRISG LATG PORTG' type=port)
    iopin (key=RG0 dir=inout)
    iopin (key=RG1 dir=inout)
    iopin (key=RG2 dir=inout)
    iopin (key=RG3 dir=inout)
    iopin (key=RG4 dir=inout)

#--------------------------------------------------------------------------------
# 				CCP
#--------------------------------------------------------------------------------

peripheral18 (key=CCP1 sfrs='CCP1CON CCPR1L CCPR1H')
    pinfunc (key=CCP1 port=RC2 dir=inout)
    interrupt (name=CCP1INT enreg=PIE1 enmask=0x04 flgreg=PIR1 flgmask=0x04 prireg=IPR1 primask=0x04)
    timers (addr=0xFB1 mask=0x48)
        setting (val=0x48 cc=TMR3 pwm=TMR2)
        setting (val=0x40 cc=TMR3 pwm=TMR2)
        setting (val=0x08 cc=TMR1 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)

peripheral18 (key=CCP2 sfrs='CCP2CON CCPR2L CCPR2H')
    pinfunc (key=CCP2 port=multi dir=inout)
        portpins (muxaddr=0x300005 muxmask=0x01)
            setting (muxval=0x00 port=RB3 dir=inout)
            setting (muxval=0x01 port=RC1 dir=inout)
    interrupt (name=CCP2INT enreg=PIE2 enmask=0x01 flgreg=PIR2 flgmask=0x01 prireg=IPR2 primask=0x01)
    specialevent (key=ADC)
    timers (addr=0xFB1 mask=0x48)
        setting (val=0x48 cc=TMR3 pwm=TMR2)
        setting (val=0x40 cc=TMR3 pwm=TMR2)
        setting (val=0x08 cc=TMR3 pwm=TMR2)
        setting (val=0x00 cc=TMR1 pwm=TMR2)

#--------------------------------------------------------------------------------
# 				OSC
#--------------------------------------------------------------------------------

peripheral18 (key=OSC sfrs='OSCCON')
    pinfunc (key=T1OSCI port=RC1 dir=in)
    pinfunc (key=T1OSCO port=RC0 dir=out)
        nextp (nextperiph=TMR1 nextpin=T1CKI)
        nextp (nextperiph=TMR3 nextpin=T3CKI)

#--------------------------------------------------------------------------------
# 				SSP
#--------------------------------------------------------------------------------

peripheral18 (key=SSP)

#--------------------------------------------------------------------------------
# 				PSP
#--------------------------------------------------------------------------------

peripheral18 (key=PSP)
