 
format=0.1

#device=PIC16F631
# DOS: DOS-00488
# PS:  DS-41204
# DS:  DS-41255B

vpp (range=10.000-12.000  dflt=11.000)
vdd (range=2.000-5.500  dfltrange=4.500-5.500  nominal=5.000)

# Updated LVP Threshold
pgming (memtech=ee tries=1 lvpthresh=4.500 boundary=4)
    wait (pgm=2500 lvpgm=2500 eedata=6000 cfg=6000 userid=6000 erase=6000 lverase=2500)
    latches(pgm=4 eedata=1 userid=1 cfg=1 rowerase=16)  

#Added by Akram to add the boundary
pgmmem (region=0x0000-0x03FF)
cfgmem (region=0x2007-0x2007)
# calmem (region=0x3FF-0x3FF) cal mem is at 2008, but does not need to be touched by the user
userid (region=0x2000-0x2003)
#Once you get the proper DOS and DS update the device id
devid (region=0x2006-0x2006 idmask=0x3FE0 id=0x1420)
eedata (region=0x0-0x7f)
testmem (region=0x2000-0x20FF) #?
bkbgvectmem (region=0x2004-0x2004)

# NOTE: The data sheet shows this as a 4 bank device. 
# Bank 2 mirrors bank 0 and bank 3 mirrors bank 1. 
NumBanks=4


MirrorRegs (0x0-0x0 0x80-0x80 0x100-0x100 0x180-0x180) # Indirect addr.
MirrorRegs (0x1-0x1 0x101-0x101) # TMR0
MirrorRegs (0x81-0x81 0x181-0x181) # OPTION_REG
MirrorRegs (0x2-0x4 0x82-0x84 0x102-0x104 0x182-0x184) # PCL, STATUS, FSR
MirrorRegs (0x5-0x7 0x105-0x107) # PORT*
MirrorRegs (0x85-0x87 0x185-0x187) # TRIS*
MirrorRegs (0xA-0xB 0x8A-0x8B 0x10A-0x10B 0x18A-0x18B) # PCLATH, INTCON

# 'Access Bank'
MirrorRegs (0x070-0x07F 0x0F0-0x0FF 0x170-0x17F 0x1F0-0x1FF)

UnusedRegs (0x08-0x09)
UnusedRegs (0x11-0x12)
UnusedRegs (0x15-0x17)
UnusedRegs (0x1B-0x1D)
UnusedRegs (0x88-0x89)
UnusedRegs (0x91-0x92)
UnusedRegs (0x9C-0x9D)
UnusedRegs (0xC0-0xEF)
UnusedRegs (0x108-0x109)
UnusedRegs (0x110-0x114)
UnusedRegs (0x117-0x117)
UnusedRegs (0x11C-0x11D)
UnusedRegs (0x120-0x16F)
UnusedRegs (0x188-0x189)
UnusedRegs (0x18e-0x18f) # ICD Hidden Registers
UnusedRegs (0x190-0x19D)
UnusedRegs (0x19F-0x1EF)

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=PORTA addr=0x5 size=1 access='u u rw rw r rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - RA5 RA4 RA3 RA2 RA1 RA0')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

# Q: I think we need some simulus-related information here.
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw u u u u')
    reset (por='xxxx----' mclr='uuuu----')
    bit (names='RB7 RB6 RB5 RB4 - - - -')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)

sfr (key=PORTC addr=0x7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=PCLATH addr=0xA size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb type=int regfiles=w pcfiles=rw)
sfr (key=INTCON addr=0xB size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RABIE TMR0IF INTF RABIF')

sfr (key=PIR1 addr=0xC size=1 access='u rw r r rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF')
    bit (tag=scl names='- ADIF - - SSPIF CCP1IF TMR2IF TMR1IF')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIR2 addr=0xD size=1 access='rw rw rw rw u u u u')
    reset (por='0000----' mclr='0000----')
    bit (names='OSFIF C2IF C1IF EEIF - - - -')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

sfr (key=TMR1 addr=0xE size=2 flags=j)
# The j flag means all these registers together form one larger register
    bit (names='TMR1' width='16')
    stimulus (scl=rwb type=int regfiles=w)
sfr (key=TMR1L addr=0xE size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=TMR1H addr=0xF size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
sfr (key=T1CON addr=0x10 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='uuuuuuuu')
    bit (names='T1GINV T1GE T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

#sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='TMR2' width='8')
#    stimulus (scl=rwb type=int regfiles=w pcfiles=w)
#sfr (key=T2CON addr=0x12 size=1 access='u rw rw rw rw rw rw rw')
#    reset (por='-0000000' mclr='-0000000')
#    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
#    stimulus (scl=rwb regfiles=w)

#sfr (key=SSPBUF addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='xxxxxxxx' mclr='uuuuuuuu')
#    bit (names='SSPBUF' width='8')
#    stimulus (scl=rwb regfiles=rw pcfiles=rw)
#sfr (key=SSPCON0 addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
#    stimulus (scl=rwb regfiles=w pcfiles=rw)

#sfr (key=CCPR addr=0x15 size=2 flags=j)
## The j flag means all these registers together form one larger register
#    bit (names='CCPR' width='16')
#    stimulus (scl=rwb type=int regfiles=w)
#sfr (key=CCPR1L addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='xxxxxxxx' mclr='uuuuuuuu')
#    bit (names='CCPR1L' width='8')
#    stimulus (scl=rwb type=int regfiles=w)
#sfr (key=CCPR1H addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='xxxxxxxx' mclr='uuuuuuuu')
#    bit (names='CCPR1H' width='8')
#    stimulus (scl=rwb type=int regfiles=w)
#sfr (key=CCP1CON addr=0x17 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='P1M DC1B CCP1M' width='2 2 4')
#    stimulus (scl=rwb regfiles=w)

sfr (key=RCSTA addr=0x18 size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG addr=0x19 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='TXREG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG addr=0x1A size=1 access='r r r r r r r r')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='RCREG' width='8')
    stimulus (scl=rb regfiles=r)

#sfr (key=PWM1CON addr=0x1C size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='PRSEN PDC' width='1 7')

## Q: There's an 'E' here, but this 'E' actually appears in DOS 0.2
## unlike all of the other 'E's that I have seen.
#sfr (key=ECCPAS addr=0x1D size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='ECCPASE ECCPAS PSSAC PSSBD' width='1 3 2 2')
#    stimulus (scl=rwb)

sfr (key=ADRESH addr=0x1E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb type=int)
#sfr (key=ADCON0 addr=0x1F size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='00000000' mclr='00000000')
#    bit (names='ADFM VCFG CHS GO/nDONE ADON' width='1 1 4 1 1')
#    bit (tag=scl names='ADFM VCFG CHS GO_nDONE ADON' width='1 1 4 1 1')
#    stimulus (scl=rwb regfiles=w)

sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRAPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='u u rw rw r rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)    
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw u u u u')
    reset (por='1111----' mclr='1111----')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 - - - -')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0x87 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)

sfr (key=PIE1 addr=0x8C size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-000000' mclr='-0000000')
    bit (names='- ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=PIE2 addr=0x8D size=1 access='rw rw rw rw u u u u')
    reset (por='0000----' mclr='0000----')
    bit (names='OSFIE C2IE C1IE EEIE - - - -')

sfr (key=PCON addr=0x8E size=1 access='u u rw rw u u rw rw')
    reset (por='--01--qq' mclr='--0u--uu')
    bit (names='- - ULPWUE SBOREN - - nPOR nBOR')
    stimulus (scl=rwb regfiles=w)

# Q: IOSCF or IRCF?
sfr (key=OSCCON addr=0x8F size=1 access='u rw rw rw r r r rw')
    reset (por='-110x000' mclr='-110x000')
    bit (names='- IOSCF OSTS HTS LTS SCS' width='1 3 1 1 1 1')
sfr (key=OSCTUNE addr=0x90 size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---uuuuu')
    bit (names='- - - TUN' width='1 1 1 5')
    stimulus (scl=rwb regfiles=w pcfiles=rw)

#sfr (key=PR2 addr=0x92 size=1 access='rw rw rw rw rw rw rw rw')
#    reset (por='11111111' mclr='11111111')
#    bit (names='PR2' width='8')
#    stimulus (scl=rwb type=int regfiles=w)

sfr (key=SSPADD addr=0x93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
# Bits are rw so they can be simulated
# sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw r r r r r r')
sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF')

sfr (key=WPUA addr=0x95 size=1 access='u u rw rw u rw rw rw')
    reset (por='--11-111' mclr='--11-111')
    bit (names='- - WPUA5 WPUA4 - WPUA2 WPUA1 WPUA0')
sfr (key=IOCA addr=0x96 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - IOCA5 IOCA4 IOCA3 IOCA2 IOCA1 IOCA0')

sfr (key=WDTCON addr=0x97 size=1 access='u u u rw rw rw rw rw')
    reset (por='---01000' mclr='---01000')
    bit (names='- - - WDTPS SWDTEN' width='1 1 1 4 1')

sfr (key=TXSTA addr=0x98 size=1 access='rw rw rw rw rw rw r rw')
    reset (por='00000010' mclr='00000010')
    bit (names='CSRC TX9 TXEN SYNC SENDB BRGH TRMT TXGD')
    stimulus (scl=rwb regfiles=w)

sfr (key=SPBRG addr=0x99 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRGH addr=0x9A size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRGH' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=BAUDCTL addr=0x9B size=1 access='w r u rw rw u rw rw')
    reset (por='01-00-00' mclr='01-00-00')
    bit (names='ABDOVF RCIDL - SCKP BRG16 - WUE ABDEN')
# sfr (key=SPBRG addr=0x12 size=2 flags=j)
# The j flag means all these registers together form one larger register
# Do not uncomment unless can chage sfr at addr 0x13 to SPBGRL
#    bit (names='SPBRG' width='16')
    stimulus (scl=rwb regfiles=w)

sfr (key=ADRESL addr=0x9E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb type=int regfiles=r)
sfr (key=ADCON1 addr=0x9F size=1 access='u rw rw rw u u u u')
    reset (por='-000----' mclr='-000----')
    bit (names='- ADCS - - - -' width='1 3 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

sfr (key=EEDATA addr=0x10C size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEDATA' width='8')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
sfr (key=EEADR addr=0x10D size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEADR' width='8')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EEDATH addr=0x10E size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - EEDATH' width='1 1 6')
    stimulus (scl=rwb regfiles=rw pcfiles=rw)
#If this SFR is placed back in the name must be included in the CORE peripherl list at the end of this file!!!    
#sfr (key=EEADRH addr=0x10F size=1 access='u u u u rw rw rw rw')
#    reset (por='----0000' mclr='----0000')
#    bit (names='- - - - EEADRH' width='1 1 1 1 4')
#    stimulus (scl=rwb regfiles=w pcfiles=rw)

# Q: I need access flags on all of these regs:
sfr (key=WPUB addr=0x115 size=1 access='rw rw rw rw u u u u')
    reset (por='1111----' mclr='1111----')
    bit (names='WPUB - - - -' width='4 1 1 1 1')
sfr (key=IOCB addr=0x116 size=1 access='rw rw rw rw u u u u')
    reset (por='0000----' mclr='0000----')
    bit (names='IOCB7 IOCB6 IOCB5 IOCB4 - - - -' width='1 1 1 1 1 1 1 1')

# Q: VRCON register map and register description different
sfr (key=VRCON addr=0x118 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C1VREN C2VREN VRR VP6EN VR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM1CON0 addr=0x119 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C1ON C1OUT C1OE C1POL C1SP C1R C1CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON0 addr=0x11A size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C2ON C2OUT C2OE C2POL C2SP C2R C2CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON1 addr=0x11B size=1 access='r r u u u u rw rw')
    reset (por='00----10' mclr='00----10')
    bit (names='MC1OUT MC2OUT - - - - T1GSS C2SYNC')
    stimulus (scl=rwb regfiles=w)

sfr (key=ANSEL addr=0x11E size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0')
    stimulus (scl=rwb regfiles=r)
sfr (key=ANSELH addr=0x11F size=1 access='u u u u rw rw rw rw')
    reset (por='----1111' mclr='----1111')
    bit (names='- - - - ANSELH' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=r)

# CS tells me b7 is read-only.
sfr (key=EECON1 addr=0x18C size=1 access='r u u u rw rw rs rs')
    reset (por='x---x000' mclr='u---q000')
    bit (names='EEPGD - - - WRERR WREN WR RD')
    stimulus (scl=rwb regfiles=w pcfiles=rw)
sfr (key=EECON2 addr=0x18D size=1 flags=w access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')

#sfr (key=PSTRCON addr=0x19D size=1 access='u u u rw rw rw rw rw')
#    reset (por='---00001' mclr='---00001')
#    bit (names='- - - STRSYNC STRD STRC STRB STRA')
sfr (key=SRCON addr=0x19E size=1 access='rw rw rw rw rw rw u u')
    reset (por='000000--' mclr='000000--')
    bit (names='SR C1SEN C2REN PULSS PULSR - -' width='2 1 1 1 1 1 1')
#sfr (key=ECLKCON addr=0x19F size=1 access='rw rw rw u u u u u')
#    reset (por='000-----' mclr='000-----')
#    bit (names='CLKALT CLK1EN CLK0EN - - - - -')

                               # -------------------#
#------------------------------# Configuration Bits #------------------------------------#
                               # -------------------#

# I can't find information on the configuration bits in the 0.4 DOS.
# We'll have to revisit this section.

cfgbits (key=CONFIG addr=0x2007 unused=0x3000)
    illegal (mask=0x48 value=0x48 msg="Current settings of PWRT and BOD are in conflict")
    field (key=OSC mask=0x7 desc="Oscillator")
        setting (req=0x7 value=0x7 desc="External RC Clockout")
        setting (req=0x7 value=0x6 desc="External RC No Clock")
        setting (req=0x7 value=0x5 desc="Internal RC Clockout")
        setting (req=0x7 value=0x4 desc="Internal RC No Clock")
        setting (req=0x7 value=0x3 desc="EC")
        setting (req=0x7 value=0x2 desc="HS")
        setting (req=0x7 value=0x1 desc="XT")
        setting (req=0x7 value=0x0 desc="LP")
    field (key=WDT mask=0x8 desc="Watchdog Timer" min=1)
        setting (req=0x8 value=0x8 desc="On")
        setting (req=0x8 value=0x0 desc="Off")
    field (key=PUT mask=0x10 desc="Power Up Timer")
        setting (req=0x10 value=0x10 desc="Off")
        setting (req=0x10 value=0x0 desc="On")
    field (key=MCLRE mask=0x20 desc="Master Clear Enable")
        setting (req=0x20 value=0x20 desc="External")
        setting (req=0x20 value=0x00 desc="Internal")
    field (key=CP mask=0x40 desc="Code Protect")
        setting (req=0x40 value=0x40 desc="Off")
            checksum (type=0x0 protregion=0x00-0x00)
        setting (req=0x40 value=0x00 desc="On")
            checksum (type=0x20 protregion=0x000-0x7FF)
    field (key=CPD mask=0x80 desc="Data EE Read Protect")
        setting (req=0x80 value=0x80 desc="Off")
        setting (req=0x80 value=0x0 desc="On")
   field (key=BODEN mask=0x300 desc="Brown Out Detect")
        setting (req=0x300 value=0x000 desc="BOD and SBOREN disabled")
        setting (req=0x300 value=0x100 desc="SBOREN controls BOR function")
        setting (req=0x300 value=0x200 desc="BOD enabled in run, disabled in sleep, SBOREN disabled")
        setting (req=0x300 value=0x300 desc="BOD Enabled, SBOREN Disabled")
    field (key=IESO mask=0x400 desc="Internal External Switch Over Mode")
        setting (req=0x400 value=0x400 desc="Enabled")
        setting (req=0x400 value=0x0 desc="Disabled")
   field (key=FCMEN mask=0x800 desc="Monitor Clock Fail-safe")
        setting (req=0x800 value=0x800 desc="Enabled")
        setting (req=0x800 value=0x0 desc="Disabled")

                               #-------------#
#------------------------------# Peripherals #------------------------------------#
                               #-------------#
#--------------------------------------------------------------------------------
# 				PORTA
#--------------------------------------------------------------------------------
peripheral (key=PORTA sfrs='TRISA PORTA IOCA' type=port)
    iopin (key=RA0 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN0)
        cnpin (key=C1INP notify=CMMUL)
    iopin (key=RA1 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN1)
        cnpin (key=C1INN0 notify=CMMUL)
        cnpin (key=C2INN0 notify=CMMUL)
    iopin (key=RA2 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN2)
        extint (key=INT0 enreg=INTCON enmask=0x10 flgreg=INTCON flgmask=0x02 prireg=NONE primask=0x00)
    iopin (key=RA3 dir=in)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN3)
    iopin (key=RA4 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN4)
        cnpin (key=T1G notify=TMR1)
    iopin (key=RA5 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN5)

#--------------------------------------------------------------------------------
# 				PORTB
#--------------------------------------------------------------------------------

peripheral (key=PORTB sfrs='TRISB PORTB IOCB' type=port)
    iopin (key=RB4 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN0)
    iopin (key=RB5 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN1)
    iopin (key=RB6 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN2)
    iopin (key=RB7 dir=inout)
        cnint (key=PORTIRQ enreg=INTCON enmask=0x08 flgreg=INTCON flgmask=0x01 prireg=NONE primask=0x00 cnkey=IOCPIN3)

#--------------------------------------------------------------------------------
# 				PORTC
#--------------------------------------------------------------------------------

peripheral (key=PORTC sfrs='TRISC PORTC' type=port)
    iopin (key=RC0 dir=inout)
        cnpin (key=C2INP notify=CMMUL)
    iopin (key=RC1 dir=inout)
        cnpin (key=C1INN1 notify=CMMUL)
        cnpin (key=C2INN1 notify=CMMUL)
    iopin (key=RC2 dir=inout)
        cnpin (key=C1INN2 notify=CMMUL)
        cnpin (key=C2INN2 notify=CMMUL)
    iopin (key=RC3 dir=inout)
        cnpin (key=C1INN3 notify=CMMUL)
        cnpin (key=C2INN3 notify=CMMUL)
    iopin (key=RC4 dir=inout)
    iopin (key=RC5 dir=inout)
    iopin (key=RC6 dir=inout)
    iopin (key=RC7 dir=inout)


#--------------------------------------------------------------------------------
# 				TIMERs
#--------------------------------------------------------------------------------
peripheral (key=TMR0 sfrs='TMR0')
    pinfunc (key=T0CKI port=RA2 dir=in)
        nextp (nextperiph=CM nextpin=C1OUT)
    interrupt (name=TMR0INT enreg=INTCON enmask=0x20 flgreg=INTCON flgmask=0x04 prireg=NONE primask=0x00)

peripheral (key=TMR1 sfrs='TMR1H TMR1L T1CON')
    pinfunc (key=T1CKI port=RA5 dir=in)
    pinfunc (key=T1G port=RA4 dir=in)
    interrupt (name=TMR1INT enreg=PIE1 enmask=0x01 flgreg=PIR1 flgmask=0x01 prireg=NONE primask=0x00)


#--------------------------------------------------------------------------------
# 				UARTs
#--------------------------------------------------------------------------------

#peripheral (key=UART1 sfrs='SPBRG RCREG TXREG TXSTA RCSTA SPBRGH BAUDCTL')
#    pinfunc (key=U1RX port=RB5 dir=in)
#    pinfunc (key=U1TX port=RB7 dir=out)
#    interrupt (name=RXINT1 enreg=PIE1 enmask=0x20 flgreg=PIR1 flgmask=0x20 prireg=NONE primask=0x00)
#    interrupt (name=TXINT1 enreg=PIE1 enmask=0x10 flgreg=PIR1 flgmask=0x10 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				CMMUL
#--------------------------------------------------------------------------------

peripheral (key=CMMUL sfrs='CM1CON0 CM2CON0 CM2CON1 VRCON')
    pinfunc (key=C1OUT port=RA2 dir=out)
    pinfunc (key=C1INP port=RA0 dir=in)
    pinfunc (key=C1INN port=multi dir=in)
        portpins (muxaddr=0x119 muxmask=0x03)
            setting (muxval=0x0 port=RA1 dir=in)
            setting (muxval=0x1 port=RC1 dir=in)
            setting (muxval=0x2 port=RC2 dir=in)
            setting (muxval=0x3 port=RC3 dir=in)
    pinfunc (key=C2OUT port=RC4 dir=out)
    pinfunc (key=C2INP port=RC0 dir=in)
    pinfunc (key=C2INN port=multi dir=in)
        portpins (muxaddr=0x11A muxmask=0x03)
            setting (muxval=0x0 port=RA1 dir=in)
            setting (muxval=0x1 port=RC1 dir=in)
            setting (muxval=0x2 port=RC2 dir=in)
            setting (muxval=0x3 port=RC3 dir=in)
    interrupt (name=CMINT enreg=PIE2 enmask=0x20 flgreg=PIR2 flgmask=0x20 prireg=NONE primask=0x00)
    interrupt (name=CM2INT enreg=PIE2 enmask=0x40 flgreg=PIR2 flgmask=0x40 prireg=NONE primask=0x00)

#--------------------------------------------------------------------------------
# 				OSC
#--------------------------------------------------------------------------------

peripheral (key=OSC sfrs='OSCCON')
    pinfunc (key=OSC2 port=RA4 dir=out)
        nextp (nextperiph=TMR1 nextpin=T1G)
    pinfunc (key=OSC1 port=RA5 dir=in)
        nextp (nextperiph=TMR1 nextpin=T1CKI)

#--------------------------------------------------------------------------------
# 				MCLR
#--------------------------------------------------------------------------------
peripheral (key=MCLR)
    pinfunc (key=MCLR port=RA3 dir=in)

#--------------------------------------------------------------------------------
# 				CORE
#--------------------------------------------------------------------------------
peripheral (key=CORE sfrs='EEDATA EEDATH EEADR EECON1 EECON2 PCON WDTCON')
    interrupt (name=EEINT enreg=PIE2 enmask=0x10 flgreg=PIR2 flgmask=0x10 prireg=NONE primask=0x00)


